LM12458CIV/NOPB National Semiconductor, LM12458CIV/NOPB Datasheet
LM12458CIV/NOPB
Specifications of LM12458CIV/NOPB
*LM12458CIV/NOPB
LM12458CIV
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LM12458CIV/NOPB Summary of contents
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... Additional applications information can be found in applica- tions notes AN-906, AN-947 and AN-949. TRI-STATE ® registered trademark of National Semiconductor Corporation. AT ® registered trademark of International Business Machines Corporation. © 2006 National Semiconductor Corporation Key Specifications ( MHz ...
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Ordering Information Guaranteed Clock Freq (min) 8 MHz 5 MHz * These products are obsolete and shown for reference only. Connection Diagrams * Pin names apply to the obsolete LM12454 and LM12H454. Order Number LM12454CIV, LM12458CIV or ...
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Functional Diagrams LM12454 The LM12(H)454 is obsolete LM12(H)458 3 01126401 01126421 www.national.com ...
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... Absolute Maximum Ratings (Notes Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V + and Voltage at Input and Output Pins, except analog inputs Voltage at Analog Inputs |V + − Input Current at Any Pin (Note 3) ...
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Converter Characteristics The following specifications apply to the LM12454, LM12458, and LM12H458 for V 12-bit + sign conversion mode, f CLK ≤ 25Ω, fully-differential input with fixed 2.5V common-mode voltage, and minimum acquisition time unless V and V REF+ REF− ...
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Converter AC Characteristics The following specifications apply to the LM12454, LM12458, and LM12H458 for V 12-bit + sign conversion mode, f CLK ≤ 25Ω, fully-differential input with fixed 2.5V common-mode voltage, and minimum acquisition time unless V and V REF+ ...
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DC Characteristics (Notes The following specifications apply to the LM12454, LM12458, and LM12H458 for 8.0 MHz (LM12H454/ CLK CLK face limits apply for MIN Symbol ...
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Digital Characteristics The following specifications apply to the LM12454, LM12458, and LM12H458 for V Boldface limits apply for Symbol Parameter V Logical “1” Input Voltage IN(1) V Logical “0” Input Voltage IN(0) I ...
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Digital Timing Characteristics Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test ...
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− V REF REF+ REF− − IN+ IN− GND ≤ V ≤V + IN+ A GND ≤ V ≤V + IN− A FIGURE 1. The General Case of Output Digital Code vs. ...
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− V REF REF+ REF− FIGURE 3. The General Case of the − V REF REF+ REF− FIGURE 4. The Specific Case of the V 01126424 Operating Range ...
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FIGURE 6. Simplified Error Curve vs. Output Code without Auto-Calibration or Auto-Zero Cycles www.national.com FIGURE 5. Transfer Characteristic 12 01126404 01126405 ...
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FIGURE 7. Simplified Error Curve vs. Output Code after Auto-Calibration Cycle FIGURE 8. Offset or Zero Error Voltage 01126407 13 01126406 www.national.com ...
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Typical Performance Characteristics after auto-calibration unless otherwise specified. The performance for 8-bit + sign and “watchdog” modes is equal to or better than shown. Linearity Error Change vs. Clock Frequency Linearity Error Change vs. Reference Voltage Full-Scale Error Change vs. ...
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Typical Performance Characteristics auto-calibration unless otherwise specified. The performance for 8-bit + sign and “watchdog” modes is equal to or better than shown. (Continued) Full-Scale Error Change vs. Reference Voltage Zero Error Change vs. Clock Frequency Zero Error Change vs. ...
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Typical Performance Characteristics auto-calibration unless otherwise specified. The performance for 8-bit + sign and “watchdog” modes is equal to or better than shown. (Continued) Analog Supply Current vs. Temperature Digital Supply Current vs. Temperature V Line Regulation REFOUT www.national.com (Note ...
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Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. Bipolar Signal-to-Noise Ratio vs. Input Frequency Bipolar Signal-to-Noise + Distortion Ratio vs. Input Signal Level Bipolar Spectral Response with 10 kHz Sine Wave Input The following curves apply for 12-bit ...
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Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Bipolar Spectral Response with 40 kHz Sine Wave Input Unipolar Signal-to-Noise Ratio vs. Input Frequency Unipolar Signal-to-Noise + Distortion Ratio vs. Input Signal Level www.national.com The following curves apply ...
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Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Unipolar Spectral Response with 10 kHz Sine Wave Input Unipolar Spectral Response with 40 kHz Sine Wave Input Test Circuits and Waveforms FIGURE 9. TRI-STATE Test Circuits and Waveforms ...
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Timing Diagrams +5V ns INT, DMARQ, D0–D15 outputs Address valid to ALE low set-up time Address ...
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Timing Diagrams outputs. (Continued) FIGURE 11. Non-Multiplexed Data Bus (ALE = pulse width 9: RD high to next low 11: WR pulse width 13: WR high to next ...
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Pin Descriptions Analog and digital supply voltage pins. The A D LM12(H)454/8’s supply voltage operating range is +3.0V to +5.5V. Accuracy is guaranteed only and V + are connected to the same power ...
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Functional Description The LM12454 and LM12(H)458 are multi-functional Data Acquisition Systems that include a fully differential 12-bit- plus-sign self-calibrating analog-to-digital converter (ADC) with a two’s-complement output format, an 8-channel (LM12(H)458 4-channel (LM12454) analog multiplexer, an internal 2.5V ...
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Internal User-Programmable Registers 2.1 INSTRUCTION RAM The instruction RAM holds up to eight sequentially execut- able instructions. Each 48-bit long instruction is divided into three 16-bit sections. READ and WRITE operations can be issued to each 16-bit section using ...
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Internal User-Programmable Registers Purpose Instruction RAM (RAM Pointer = 00 Instruction RAM 0 ...
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Internal User-Programmable Registers (Continued) Bits 12–15 are used to store the user-programmable acqui- sition time. The Sequencer keeps the internal S/H in the acquisition mode for a fixed number of clock cycles (nine clock cycles, for 12-bit + sign ...
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Internal User-Programmable Registers (Continued) mand (“1”) disconnects the external clock from the internal circuitry, decreases the LM12(H)454/8’s internal analog cir- cuitry power supply current, and preserves all internal RAM contents. After writing a “0” to the Standby bit, the ...
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Internal User-Programmable Registers (Continued) The completion of the short, single-sample auto-zero calibra- tion generates Interrupt 3. The completion of a full auto-zero and linearity self- calibration generates Interrupt 4. Interrupt 5 is generated when the Sequencer encounters an instruction ...
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Other Registers and Functions (Continued) ceeds the threshold stored in the instruction’s Limit #1 reg- ister. When, for example, instruction “watchdog” op- eration (Bit 11 is set high) and the input for instruction 3 meets the ...
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Sequencer (Continued) Leaving this bit reset to “0” allows the Sequencer to execute “unprogrammed” instructions, the results of which may be unpredictable. The Sequencer’s Instruction Pointer value is readable at any time and is found in the Status register ...
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Sequencer (Continued) FIGURE 15. Sequencer Logic Flow Chart (IP = Instruction Pointer) www.national.com 01126419 32 ...
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Design Considerations 6.1 REFERENCE VOLTAGE The difference in the voltages applied to the V V defines the analog input voltage span (the difference REF− between the voltages applied between two multiplexer inputs or the voltage applied to one of ...
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Design Considerations niques). Failure can result in erratic operation. Generally, a series 30Ω to 50Ω resistor in the clock line, located as close to the clock source as possible, will prevent most problems. The clock source ...
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Physical Dimensions inches (millimeters) unless otherwise noted Order Number LM12454CIV, LM12458CIV or LM12H458CIV Order Number LM12H458CIVF or LM12458CIVF NS Package Number V44A NS Package Number VGZ44A 35 www.national.com ...
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