AD9277BSVZ Analog Devices Inc, AD9277BSVZ Datasheet - Page 22
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
AD9277BSVZ
Manufacturer Part Number
AD9277BSVZ
Description
IC ADC 14BIT LNA/VGA/AAF 100TQFP
Manufacturer
Analog Devices Inc
Type
Ultrasound Receiversr
Datasheet
1.AD9277BSVZ.pdf
(48 pages)
Specifications of AD9277BSVZ
Resolution (bits)
14 b
Data Interface
Serial, SPI™
Sampling Rate (per Second)
10M ~ 50M
Voltage Supply Source
Analog and Digital
Voltage - Supply
1.8V, 3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Sampling Rate
50MSPS
Input Channel Type
Single Ended
Supply Voltage Range - Digital
1.7V To 1.9V
Supply Current
365mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9277BSVZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
AD9277
CHANNEL OVERVIEW
Each channel contains both a TGC signal path and a CW Doppler
signal path. Common to both signal paths, the LNA provides user-
adjustable input impedance termination. The CW Doppler path
includes an I/Q demodulator. The TGC path includes a differen-
tial X-AMP® VGA, an antialiasing filter, and an ADC. Figure 46
shows a simplified block diagram with external components.
The signal path is fully differential throughout to maximize signal
swing and reduce even-order distortion; however, the LNA is
designed to be driven from a single-ended signal source.
Low Noise Amplifier (LNA)
Good noise performance relies on a proprietary ultralow noise
LNA at the beginning of the signal chain, which minimizes the
noise contribution in the following VGA. Active impedance
control optimizes noise performance for applications that
benefit from input impedance matching.
A simplified schematic of the LNA is shown in Figure 47. LI-x
is capacitively coupled to the source. An on-chip bias generator
establishes dc input bias voltages of around 0.9 V and centers the
output common-mode levels at 1.5 V (AVDD2 divided by 2). A
capacitor, C
C
It is highly recommended that the LG-x pins form a Kelvin type
connection to the input or probe connection ground. Simply
connecting the LG-x pin to ground near the device can allow
differences in potential to be amplified through the LNA. This
generally shows up as a dc offset voltage that can vary from
channel to channel and part to part, depending on the appli-
cation and the layout of the PCB.
S
TRANSDUCER
, is connected from the LG-x pin to ground.
SWITCH
LG
T/R
, of the same value as the input coupling capacitor,
C
S
C
SH
R
R
C
FB1
FB2
LG
4LO–
4LO+
RESET
LO-x
LOSW-x
LG-x
LI-x
Figure 46. Simplified Block Diagram of a Single Channel
LNA
15.6dB,
17.9dB,
21.3dB
GENERATION
LO
INTERPOLATOR
GAIN+
ATTENUATOR
–42dB TO 0dB
Rev. 0 | Page 22 of 48
GAIN
4
GAIN–
X-AMP VGA
The LNA supports differential output voltages as high as 4.4 V p-p
with positive and negative excursions of ±1.1 V from a common-
mode voltage of 1.5 V. The LNA differential gain sets the maximum
input signal before saturation. One of three gains is set through the
SPI. The corresponding full-scale input for the gain settings of
15.6 dB, 17.9 dB, and 21.3 dB is 733 mV p-p, 550 mV p-p, and
367 mV p-p, respectively. Overload protection ensures quick
recovery time from large input voltages. Because the inputs are
capacitively coupled to a bias voltage near midsupply, very large
inputs can be handled without interacting with the ESD
protection.
TRANSDUCER
POST
AMP
21dB,
24dB,
27dB,
30dB
SWITCH
T/R
C
AAF
S
Figure 47. Simplified LNA Schematic
C
LI-x
SH
V
CM
V
O
+
PIPELINE
ADC
C
FB
SERIAL
LVDS
R
R
FB1
FB2
V
O
–
V
CM
LG-x
C
CWI+
CWI–
CWQ+
CWQ–
DOUTx+
DOUTx–
LG
LOSW-x
LO-x