X9241AWS Intersil, X9241AWS Datasheet - Page 8
![IC DCP QUAD 10K 64TP 20SOIC](/photos/6/58/65875/20-20-soic_sml.jpg)
X9241AWS
Manufacturer Part Number
X9241AWS
Description
IC DCP QUAD 10K 64TP 20SOIC
Manufacturer
Intersil
Series
XDCP™r
Datasheet
1.X9241AUP.pdf
(16 pages)
Specifications of X9241AWS
Taps
64
Resistance (ohms)
10K
Number Of Circuits
4
Temperature Coefficient
30 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Resistance In Ohms
10K, 10K, 10K, 10K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
X9241AWSIZ
Manufacturer:
Intersil
Quantity:
230
Part Number:
X9241AWSIZ
Manufacturer:
INTERSIL
Quantity:
20 000
Company:
Part Number:
X9241AWSIZT1
Manufacturer:
Intersil
Quantity:
500
Part Number:
X9241AWSIZT1
Manufacturer:
INTERSIL原装
Quantity:
20 000
Company:
Part Number:
X9241AWSZ
Manufacturer:
Intersil
Quantity:
35
Detailed Operation
All four XDCP potentiometers share the serial interface and
share a common architecture. Each potentiometer is
comprised of a resistor array, a Wiper Counter Register and
four Data Registers. A detailed discussion of the register
organization and array operation follows.
Wiper Counter Register
The X9241A contains four volatile Wiper Counter Registers
(WCR), one for each XDCP potentiometer. The WCR can be
envisioned as a 6-bit parallel and serial load counter with its
outputs decoded to select one of sixty-four switches along its
resistor array. The contents of the WCR can be altered in
four ways: it may be written directly by the host via the Write
WCR instruction (serial load); it may be written indirectly by
transferring the contents of one of four associated Data
Registers via the XFR Data Register instruction (parallel
load); it can be modified one step at a time by the
increment/decrement instruction; finally, it is loaded with the
contents of its Data Register zero (DR0) upon power-up.
SERIAL DATA PATH
FROM INTERFACE
IF WCR = 3F[H] THEN V
IF WCR = 00[H] THEN V
CIRCUITRY
W
W
/R
/R
W
W
= V
= V
REGISTER 0
8
REGISTER 2
H
L
/R
/R
L
H
FIGURE 8. DETAILED POTENTIOMETER BLOCK DIAGRAM
8
2
REGISTER 1
REGISTER 3
MODIFIED SCL
X9241A
UP/DN
6
The WCR is a volatile register; that is, its contents are lost
when the X9241A is powered-down. Although the register is
automatically loaded with the value in DR0 upon power-up, it
should be noted this may be different from the value present
at power-down.
Data Registers
Each potentiometer has four nonvolatile Data Registers.
These can be read or written directly by the host and data
can be transferred between any of the four Data Registers
and the WCR. It should be noted all operations changing
data in one of these registers is a nonvolatile operation and
will take a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, these registers can be used
as regular memory locations that could possibly store
system parameters or user preference data.
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
UP/DN
CLK
DW
CM
REGISTER
CASCADE
CONTROL
COUNTER
INC/DEC
WIPER
LOGIC
LOGIC
C
O
U
N
E
R
D
E
C
O
D
E
T
V
V
V
August 31, 2007
H
L
W
/R
/R
/R
L
H
W
FN8164.6