LTC1456CS8 Linear Technology, LTC1456CS8 Datasheet - Page 6
LTC1456CS8
Manufacturer Part Number
LTC1456CS8
Description
IC D/A CONV 12BIT R-R 8-SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1456CS8PBF.pdf
(8 pages)
Specifications of LTC1456CS8
Settling Time
14µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
2.2mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC1456CS8
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC1456CS8
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Company:
Part Number:
LTC1456CS8#PBF
Manufacturer:
LTC
Quantity:
355
DEFI ITIO S
Resolution (n): Resolution is defined as the number of
digital input bits, n. It defines the number of DAC output
states (2
does not imply linearity.
Full-Scale Voltage (V
when all bits are set to 1.
Voltage Offset Error (V
output when the DAC is loaded with all zeros. The output
amplifier can have a true negative offset, but because the
part is operated from a single supply, the output cannot go
below zero. If the offset is negative, the output will remain
near 0V resulting in the transfer curve shown in Figure 1.
The offset of the part is measured at the code that corre-
sponds to the maximum offset specification:
Least Significant Bit (LSB): One LSB is the ideal voltage
difference between two successive codes.
LTC1456
6
V
LSB = (V
LSB = 4.095/4095 = 1mV
OS
= V
U
n
) that divide the full-scale range. The resolution
OUT
FS
– V
– [(Code • V
U
OS
)/(2
FS
OS
n
): This is the output of the DAC
): The theoretical voltage at the
– 1) = (V
FS
)/(2
n
FS
– 1)]
NEGATIVE
– V
OFFSET
VOLTAGE
OS
OUTPUT
)/4095
Figure 1. Effect of Negative Offset
0V
DAC CODE
Integral Nonlinearity (INL): End-point INL is the maxi-
mum deviation from a straight line passing through the
end-points of the DAC transfer curve. Because the part
operates from a single supply and the output cannot go
below zero, the linearity is measured between full scale
and the code corresponding to the maximum offset speci-
fication. The INL error at a given input code is calculated
as follows:
Differential Nonlinearity (DNL): DNL is the difference
between the measured change and the ideal 1LSB change
between any two adjacent codes. The DNL error between
any two codes is calculated as follows:
Digital Feedthrough: The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
(nV)(sec).
INL
V
DNL
OUT
V
OUT
1456 F01
= [V
= The output voltage of the DAC measured at
= ( V
= The measured voltage difference between
the given input code
two adjacent codes
OUT
OUT
– V
– LSB)/LSB
OS
– (V
FS
– V
OS
)(code/4095)]/LSB