MT47H32M8BP-5E IT:B Micron Technology Inc, MT47H32M8BP-5E IT:B Datasheet - Page 23
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MT47H32M8BP-5E IT:B
Manufacturer Part Number
MT47H32M8BP-5E IT:B
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M8BP-5E_ITB.pdf
(128 pages)
Specifications of MT47H32M8BP-5E IT:B
Organization
32Mx8
Density
256Mb
Address Bus
15b
Access Time (max)
600ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
125mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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Electrical Specifications – I
I
Table 8: General I
I
PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
I
CL (I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DD
DD7
DD
RCD (I
RC (I
RRD (I
RRD (I
CK (I
RAS MIN (I
RAS MAX (I
RP (I
RFC (I
RFC (I
RFC (I
RFC (I
FAW (I
FAW (I
Parameters
DD
Specifications and Conditions
DD
DD
DD
Conditions
DD
DD
DD
DD
)
DD
DD
DD
DD
DD
)
)
)
)
) - x4/x8 (1KB)
) - x16 (2KB)
- 256Mb)
- 512Mb)
- 1Gb)
- 2Gb)
) - x4/x8 (1KB)
) - x16 (2KB)
DD
DD
)
)
DD
Notes:
Parameters
The detailed timings are shown below for I
conflict with pattern requirements of Table 9, then Table 9 requirements take precedence.
Table 9: I
Timing patterns for 4-bank x4/x8/x16 devices
1. A = active; RA = read auto precharge; D = deselect.
2. All banks are being interleaved at
3. Control and address bus inputs are STABLE during DESELECTs.
Speed Grade
-37E
-5E
-3
DD7
Timing Patterns (4-Bank Interleave READ Operation)
DD
I
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D D D
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D D D
A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D D
DD7
Parameters
Timing Patterns
70,000
127.5
105
195
7.5
15
60
10
45
15
75
-3
5
3
23
Electrical Specifications – I
Defined by pattern in Table 9
Defined by pattern in Table 9
t
RC (I
Micron Technology, Inc. reserves the right to change products or specifications without notice.
DD
DD7
256Mb: x4, x8, x16 DDR2 SDRAM
70,000
127.5
) without violating
-37E
3.75
105
195
7.5
15
60
10
45
15
75
. Where general I
4
©2003 Micron Technology, Inc. All rights reserved.
t
70,000
DD
RRD (I
127.5
105
195
-5E
7.5
15
55
10
40
15
75
3
5
parameters in Table 8
DD
DD
) using a BL = 4.
Parameters
Units
t
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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