PEB20571FV31XT Lantiq, PEB20571FV31XT Datasheet - Page 216
PEB20571FV31XT
Manufacturer Part Number
PEB20571FV31XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB20571FV31XT.pdf
(308 pages)
Specifications of PEB20571FV31XT
Lead Free Status / Rohs Status
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6.2.6.3
GINT Register
Reset value: 0000
INTn bits
Note: INT0-INT3 are reset by a read access to this register
Note: For GCHM:CHMOD = 00 (cha. 0 up to 8 MBit/s) only INT0 is used
Data Sheet
For GCHM:CHMOD = 01 (cha. 0 and 3 up to 2 MBit/s) only INT0, INT3 are used.
For GCHM:CHMOD = 10 (cha. 0..3 up to 2 MBit/s) all bits are used
15
7
x
x
GHDLC Interrupt Register
Interrupt Indication for GHDLC Channel n (= 0..3)
0 =
1 =
H
14
6
x
x
Normal operation
GHDLC interrupt has occurred
13
5
x
x
12
4
read
x
x
199
INT3
11
3
x
INT2
10
2
x
Register Description
Address: D0D4
INT1
9
x
1
PEB 20570
PEB 20571
2003-07-31
INT0
8
0
x
H
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