PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 390
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
- Current page: 390 of 407
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Clock period low
Clock period high
Clock period
Clock period low
Clock period high
Frame set-up time to clock
Frame hold time from clock
Data clock delay
Serial data input set-up time
Serial data hold time from
Serial data input set-up time
Serial data hold time from
Serial data input set-up time
Serial dta hold time from
Serial data input set-up time
Serial data hold time from
PCM-serial data output delay
Tristate control delay
CFI-serial data output delay
CFI-serial data output delay
PCM and Configurable Interface Timing
Parameter
Clock period
Semiconductor Group
Symbol Limit Values Unit Test Condition
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CP
CPL
CPH
CP
CPL
CPH
FS
FH
DCD
S
H
S
H
S
H
S
H
D
T
CDF
CDR
min.
390
240
100
120
80
50
50
25
50
35
15
55
20
50
75
7
0
–
max.
125
55
60
65
90
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Characteristics
clock frequency
clock frequency
> 4096 kHz
PCM-input data
frequency > 4096 kbit/s
PCM-input data
frequency
CFI-input data
frequency > 4096 kbit/s
CFI-input data
frequency
falling clock edge
rising clock edge
4096 kHz
PEB 20550
PEF 20550
4096 kbit/s
4096 kbit/s
01.96
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