GWIXP460BAD Intel, GWIXP460BAD Datasheet - Page 26

• Manufacturer Part Number: GWIXP460BAD
• Manufacturer: Intel

Specifications of GWIXP460BAD

• Core Operating Frequency: 533MHz
• Operating Supply Voltage (typ): 1.3/1.5/2.5/3.3V
• Operating Supply Voltage (max): 1.575/2.7/3.465V
• Operating Supply Voltage (min): 1.235/2.3/3.135V
• Package Type: BGA
• Pin Count: 544
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Functional Overview
3.1.9
May 2005
26
NOTES:
1. Table indicates 32-bit-wide memory subsystem sizes
2. Table indicates 32-bit-wide memory page sizes
DDRI SDRAM
Technology
Table 4.
512 Mbit
1 Gbit
Supported DDRI Memory Configurations (Sheet 2 of 2)
The memory controller is a 32-bit only interface. If a x16 memory chip is used, a minimum of two
memory chips would be required to facilitate the 32-bit interface required by the IXP45X/IXP46X
network processors. If ECC is required, additional memories would need to be added. For more
information on DDRI SDRAM support and configuration see the Intel
IXP46X Product Line of Network Processors Developer’s Manual.
The memory controller internally interfaces to the North AHB, South AHB, and Memory Port
Interface with independent interfaces. This architecture allows DDRI SDRAM transfers to be
interleaved and pipelined to achieve maximum possible efficiency.
The maximum burst size supported to the DDRI SDRAM interface is eight 32-bit words. This burst
size allows the best efficiency/fairness performance between peripheral accesses from the North
AHB, the South AHB, and the MPI.
The programming priority of the MCU is for the Memory Port Interface to have the highest priority
and two AHB ports will have the next highest priority. For more information on MCU arbitration
support and configuration see the Intel
Processors Developer’s Manual.
One item to be aware of is that when ECC is being used, the memory chip chosen to support the
ECC must match that of the technology chosen on the interface. Therefore, if x8 in a given
configuration technology is chosen then the ECC memory chip must be the same. If a x16
configuration is chosen then a x16 chip must be used for the ECC chip.
Expansion Interface
The expansion interface allows easy and — in most cases — glue-less connection to peripheral
devices. It also provides input information for device configuration after reset.
Some of the peripheral device types are SRAM, flash, ATM control interfaces, and DSPs used for
voice applications. (Some voice configurations can be supported by the HSS interfaces and the
Intel XScale core, implementing voice-compression algorithms.)
The expansion interface functions in two modes of operation:
DDRI SDRAM
Arrangement
32M x 16
128M x 8
64M x 16
64M x 8
# Banks
1
2
1
2
1
2
1
2
Intel
Address Size
Row
13
13
14
14
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Col
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10
10
11
11
IXP45X and Intel
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IXP46X Product Line of Network Processors Datasheet
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IXP46X Product Line of Network
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IXP45X and Intel
256 Mbyte
512 Mbyte
128 Mbyte
256 Mbyte
512 Mbyte
256 Mbyte
512 Mbyte
Memory
1 Gbyte
Size
Total
1
306261-002
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Size
Page
8K
8K
4K
4K
8K
8K
4K
4K
2