GWIXP460BAD Intel, GWIXP460BAD Datasheet - Page 57

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GWIXP460BAD

Manufacturer Part Number
GWIXP460BAD
Description
Manufacturer
Intel
Datasheet

Specifications of GWIXP460BAD

Core Operating Frequency
533MHz
Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Package Type
BGA
Pin Count
544
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Package Information
Table 14.
May 2005
57
HSS_TXFRAME1
HSS_TXDATA1
HSS_TXCLK1
HSS_RXFRAME1
NOTE: This table discusses all features supported on the Intel
† For a legend of the Type codes, see
Name
see
Table 1 on page
High-Speed, Serial Interface 1 (Sheet 1 of 2)
Power
Reset
on
Z
Z
Z
Z
14.
Reset
Z
Z
Z
Z
Table 10 on page
Software
Enables
Normal
Reset
After
Until
VOD
VB
VB
VB
Software
46.
Enables
Normal
After
VOD
VB
VB
VB
®
IXP45X and Intel
Type
OD
I/O
I/O
I/O
The High-Speed Serial (HSS) transmit frame signal can be configured as an input or an output to
allow an external source to be synchronized with the transmitted data. Often known as a Frame
Sync signal. Configured as an input upon reset.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the HSS soft
fuse (refer to Expansion Bus Controller chapter of the Intel
Line of Network Processors Developer’s Manual) and is not being used in a system design, this
interface/signal is not required for any connection.
Transmit data out. Open Drain output.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor to V
HSS soft fuse (refer to Expansion Bus Controller chapter of the Intel
Product Line of Network Processors Developer’s Manual) and is not being used in a system
design, this interface/signal is not required for any connection.
The High-Speed Serial (HSS) transmit clock signal can be configured as an input or an output.
The clock can be a frequency ranging from 512 KHz to 8.192 MHz. Used to clock out the
transmitted data. Configured as an input upon reset. Frame sync and Data can be selected to be
generated on the rising or falling edge of the transmit clock.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor.
The High-Speed Serial (HSS) receive frame signal can be configured as an input or an output to
allow an external source to be synchronized with the received data. Often known as a Frame Sync
signal. Configured as an input upon reset.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-KΩ resistor. When this interface is disabled via the HSS soft
fuse (refer to Expansion Bus Controller chapter of the Intel
Line of Network Processors Developer’s Manual) and is not being used in a system design, this
interface/signal is not required for any connection.
®
IXP46X Product Line of Network Processors. For details on feature support listed by processor,
Intel
®
IXP45X and Intel
®
Description
IXP46X Product Line of Network Processors Datasheet
CCP
. When this interface is disabled via the
®
®
IXP45X and Intel
IXP45X and Intel
Document Number:
®
IXP45X and Intel
®
®
IXP46X Product
IXP46X Product
306261-002
®
IXP46X

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