EWIXP420ABBT Intel, EWIXP420ABBT Datasheet - Page 28

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EWIXP420ABBT

Manufacturer Part Number
EWIXP420ABBT
Description
Manufacturer
Intel
Datasheet

Specifications of EWIXP420ABBT

Core Operating Frequency
533MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant

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3.2.3
Figure 6.
3.2.4
Intel
Hardware Design Guidelines
28
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
The user-defined bit-field can be used in many ways. For example, this field could be
used for board-revision identification; a series of board revisions may be made over the
course of development. To indicate a particular board revision, one of the 16 possible
values can be encoded using hardware configuration as stated above. Another potential
use for this field would be to predefine a set of values to indicate a particular board
configuration — for example, one with a different set of devices and memory map.
Many other creative options, not identified in this document, are possible.
Flash Interface
Figure 6
flash used in the block diagram is the Intel
28F128J3D. The boot ROM address space supports up to 16-Mbyte (128-Mbit) of flash.
The boot ROM maps to the Intel XScale
(reset), the Intel
fetch and execute instructions from address 0x00.
Expansion Bus Flash Interface
See Intel StrataFlash
Conversion Guide - Application Note 835 for more detailed information. For information
on design with Intel StrataFlash
Embedded Memory (P30) to Intel
IXC1100 Control Plane Processor Design Guide - Application Note 832. For information
on migrating from J3 to P30 Intel StrataFlash
StrataFlash
- Application Note 812.
SRAM Interface
Figure 7
and IXC1100 control plane processors’ expansion bus.
Intel
illustrates how the boot ROM is connected through the expansion bus. The
shows a typical connection for SRAM connected on the IXP42X product line
and IXC 1100 Control
Plane Processors
®
®
Product Line
IXP42X product line and IXC1100 control plane processors—General Hardware Design
Memory J3 to Intel StrataFlash
EX_ADDR[23:0]
EX _DATA[15:0]
IXP42X
®
EX _CS_N0
EX _WR_N
EX_RD_N
IXP42X product line and IXC1100 control plane processors begin to
®
memory (J3) to Intel
®
®
Embedded Memory (P30), see the Intel StrataFlash
3.3V
IXP42X Product Line of Network Processors and
10K
®
Processor physical address 0x00. At startup
RST#
®
®
®
®
Embedded Flash Memory (J3 v.D)
Embedded Memory (P30) Migration Guide
Embedded Flash Memory (J3 v.D)
Embedded Memory (P30), see the Intel
Intel Flash Interface
Document Number: 252817-008US
DQ[15:0]
A[23:0]
OE #
VPEN #
CE0
WE#
CE1
CE2
RP#
BYTE
#
B-01
Considerations
December 2007
®