EWIXP420ABBT Intel, EWIXP420ABBT Datasheet - Page 63

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EWIXP420ABBT

Manufacturer Part Number
EWIXP420ABBT
Description
Manufacturer
Intel
Datasheet

Specifications of EWIXP420ABBT

Core Operating Frequency
533MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant

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General Layout and Routing Guide—Intel
processors
Figure 26.
6.3
December 2007
Document Number: 252817-008US
Pad-to-Pad Clearance of Passive Components to a PGA or BGA
General Routing Guides
This section details general routing guidelines for connecting the IXP42X product line
and IXC1100 control plane processors. The specific details on the layout of the PCI,
133-MHz memory interface are discussed in later sections.
The order in which signals are routed varies from designer to designer. Some designers
prefer to route all clock signals first, while others prefer to route all high-speed-bus
signals first. Either order can be used, provided the guidelines listed here are followed.
• Route the processor address/data and control signals using a “daisy-chain”
• Keep stubs as short as possible (preferably, the electrical length of the stub less
• All critical signals need to be routed once the power planes are done
• Use proper topology for the specific application
• Do not route any signals in the ground and power planes.
• Do not route signals close to the edge of the PCB board.
• If a trace is routed along the edge of the plane, the capacitance is reduced and
• Don’t route within 100 mils from the edge of the ground plane on the PCB.
topology; this topology assumes that no stubs are used to connect any devices on
the net
than half of the length of the rise time of signal)
Stripline traces are covered by a power or ground plane on the top and bottom.
Microstrip traces are shielded only on one side. Therefore, EMI from signal traces is
lower for stripline.
there is an impedance change, causing a discontinuity. Route signal at least 5H
away from the edge of the plane where H is the distance of the trace from the
plane.
Intel
®
PGA or BGA Package
®
IXP42X product line and IXC1100 control plane
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
60 mils min
60 mils min
60 mils min
B2268-01
Hardware Design Guidelines
63