EWIXP420ABBT Intel, EWIXP420ABBT Datasheet - Page 64

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EWIXP420ABBT

Manufacturer Part Number
EWIXP420ABBT
Description
Manufacturer
Intel
Datasheet

Specifications of EWIXP420ABBT

Core Operating Frequency
533MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant

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Figure 27.
Intel
Hardware Design Guidelines
64
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Signal Changing Reference Planes
If the signal jumps planes, its reference will change, as shown in
there will be a discontinuity in the path of the signal.
When the signal jumps from the GND plane to PWR plane, the return current will have
to flow to the ground plane through local capacitance, and hence the path for the
return currents will be more inductive.
• Route similar signal types together to avoid crosstalk with other functions and
• Provide a ground return shield connected at both sides of each group to further
• Each layer should have a 100-mil-wide ring of copper around the edge of the PCB.
• Provide sufficient return paths for the processor power and ground.
• Minimize number of vias and corners.
• Keep high-speed switching buses and logic away from the clock chip.
• Do not route under crystals, oscillators, clock synthesizers, or magnetic devices
• Route all high-frequency traces (clocks, etc.) on one layer.
• Minimize ground loops between fast-rise-time circuits and system ground and
• Match length, and width of differential signal traces.
• Keep space between differential signal traces uniform along the length.
• Keep differential signals away from long and parallel high speed paths, such as
• Position input/output circuitry close to input/output connections.
• Avoid placing high-power circuits close to sensitive circuits and avoid long parallel
• Do not locate high-frequency oscillators and switching networks close to sensitive
• Arrange the board so that the return currents for high-speed traces never have to
• Provide ground vias next to every signal via explicitly for the purpose of letting
• Select type of grounding: single- or multi-point
interfaces.
reduce cross talk.
This ring should be connected to ground plane to reduce the EMI from the board.
(ferrites, toroids).
functional subsections.
clock signals and data strobe signals.
traces between them.
analog circuits.
jump between planes. Restrict traces to remain on either side of whichever ground
plane they start out nearest; this is to allow the use of naturally grouped horizontal
and vertical routing layers.
return currents jump between layers.
Intel
GND
PWR
®
IXP42X product line and IXC1100 control plane processors—General Layout and Routing
Driver
ByPass Caps
Signal
Trace
Return Current
VIAs
Signal
Signal
Document Number: 252817-008US
Receiver
Figure
27; therefore,
B2269-01
December 2007
Guide