EWIXP420ABBT Intel, EWIXP420ABBT Datasheet - Page 67

• Manufacturer Part Number: EWIXP420ABBT
• Manufacturer: Intel

Specifications of EWIXP420ABBT

• Core Operating Frequency: 533MHz
• Package Type: BGA
• Pin Count: 492
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

General Layout and Routing Guide—Intel
processors
6.3.3
6.3.4
December 2007
Document Number: 252817-008US
USB Considerations
In order to meet the voltage drop and EMI requirements in the Universal Serial Bus
Specification, Revision 1.1 the following guidelines must be considered:
Crosstalk
Crosstalk is caused by capacitance and inductance coupling between signals. Crosstalk
is composed of both backward and forward cross-talk components. Backward crosstalk
creates an induced signal on the network that propagates in the opposite direction of
the aggressor signal. Forward crosstalk creates a signal that propagates in the same
direction as the aggressor signal.
Circuit board analysis software should be used to analyze your board layout for
crosstalk problems.
• For LAN designs, the length of the differential traces between the RJ connector
• LAN differential traces must be impedance matched to the wire on the connector
• Capacitors for LAN:
• Use separate ground and power planes if possible.
• The impedance is 90 Ωs between the differential pair USB_DPOS and USB_DNEG to
• USB data lines must be routed as “critical signals” (for example, hand routing is
• Route the signals close to each other as parallel traces on the PCB
• Match the trace length as closely as possible (within +/- 0.5 inches)
• Before entry to the connector, use ferrite beads on the USB_DPOS and USB_DNEG
• Ferrite beads at the Vcc and GND connections of the connector are also strongly
solder pads to transformer’s transmit and receive solder pads should preferably be
less than three inches, and never more than four inches.
side of the transformer and the terminating resistance on the other side of the
transformer. For Ethernet, the wire side impedance is approximately 100 Ω. The
differential impedance on the transformer side of the magnetics should be between
95 – 115 Ω. The calculated impedance of the trace should be about 100 Ω.
match the 90 Ω twisted pair cable impedance. Note that the twisted pair
characteristics impedance of 90 Ω is the series impedance of both wires, resulting
in an individual wire presenting a 45 Ω impedance. The trace impedance can be
controlled by carefully selecting the trace width, trace distance from power or
ground planes, and physical proximity of nearby traces.
preferred). The USB_DPOS/USB_DNEG signal pair must be routed together and not
parallel with other signal traces to minimize crosstalk. Doubling the space from the
USB_DPOS/USB_DNEG signal pair to adjacent signal traces will help to prevent
crosstalk. Do not worry about crosstalk between the two USB_DPOS/USB_DNEG
signal traces. The USB_DPOS/USB_DNEG signal traces must also be the same
length. This will minimize the effect of common mode current on EMI.
lines. Use high value ferrite beads (100 MHz/60 Ω – 100 MHz/240 Ω)
recommended to isolate noise from the power supplies.
— One capacitor of at least 4.7 µF, within 0.2 inches of each side of the LAN ICs;
— One capacitor of 820 pF to 0.120 µF within 0.2 inches of each side of the LAN
— Termination resistance tolerance must be 1% or better (as 5% or greater will
— Capacitors connected between TDP and TDN traces should not exceed 22 pF for
these capacitors may be placed on the back of the printed circuit board.
ICs. Placing these capacitors on the back is also acceptable.
cause excessive output amplitude deviation from IEEE spec limits).
100Base-TX and faster data rate (keep around 12 pF).
Intel
®
®
IXP42X product line and IXC1100 control plane
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Hardware Design Guidelines
67