EP2S60F484C5N Altera, EP2S60F484C5N Datasheet - Page 19
![IC STRATIX II FPGA 60K 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP2S60F484C5N
Manufacturer Part Number
EP2S60F484C5N
Description
IC STRATIX II FPGA 60K 484-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S60F484C5N
Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
334
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
60440
# I/os (max)
334
Frequency (max)
609.76MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
For Use With
544-1700 - DSP KIT W/STRATIX II EP2S60N544-1697 - NIOS II KIT W/STRATIX II EP2S60N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1908
EP2S60F484C5N
EP2S60F484C5N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S60F484C5N
Manufacturer:
ALTERA
Quantity:
238
Part Number:
EP2S60F484C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Figure 2–7. ALM in Normal Mode
Note to
(1)
Altera Corporation
May 2007
datae0
datae1
datae0
datae1
datae0
datae1
dataf0
dataf1
dataf0
dataf1
dataf0
dataf1
dataa
datab
datad
datac
dataa
datab
datad
datac
dataa
datab
datad
datac
Combinations of functions with fewer inputs than those shown are also supported. For example, combinations of
functions with the following number of inputs are supported: 4 and 3, 3 and 3, 3 and 2, 5 and 2, etc.
Figure
2–7:
3-Input
LUT
4-Input
5-Input
5-Input
4-Input
4-Input
LUT
LUT
LUT
LUT
LUT
The normal mode provides complete backward compatibility with four-
input LUT architectures. Two independent functions of four inputs or less
can be implemented in one Stratix II ALM. In addition, a five-input
function and an independent three-input function can be implemented
without sharing inputs.
Note (1)
combout0
combout1
combout0
combout1
combout0
combout1
datae0
datae1
datae0
datae0
datae1
dataf0
dataf1
dataf0
dataf0
dataf1
dataa
datab
datad
dataa
datab
datad
dataa
datab
datad
datac
datac
datac
Stratix II Device Handbook, Volume 1
6-Input
6-Input
6-Input
5-Input
5-Input
LUT
LUT
LUT
LUT
LUT
Stratix II Architecture
combout0
combout1
combout0
combout0
combout1
2–11