EP3SL150F780C4N Altera, EP3SL150F780C4N Datasheet - Page 32

• Manufacturer Part Number: EP3SL150F780C4N
• Description: IC STRATIX III FPGA 150K 780FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F780C4N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 488
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Stratix III
• Number Of Logic Blocks/elements: 142500
• # I/os (max): 488
• Frequency (max): 450MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.1V
• Logic Cells: 142500
• Ram Bits: 6543360
• Operating Supply Voltage (min): 1.05V
• Operating Supply Voltage (max): 1.15V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2403; EP3SL150F780C4NES

1–22
Table 1–25. True and Emulated LVDS Specifications for Stratix III Devices
Stratix III Device Handbook, Volume 2
LVDS_E_1R -f
(data rate)
t
t
t
t
t
TCCS
TCCS
Receiver
f
f
DPA
DPA run length
Soft CDR mode
Soft-CDR PPM
tolerance
x Jitter
DUTY
RISE
RISE
RISE
HSDRDPA
HSDR
& t
& t
& t
(data rate)
(5)
Symbol
FALL
FALL
FALL
(data rate)
HSDR
SERDES factor
J = 4 to 10
Total Jitter for
Data Rate,
600 Mbps –
1.6 Gbps
Total Jitter for
Data Rate,
< 600 Mbps
T
cycle for both
True and
Emulated
Differential I/O
True Differential
I/O Standards
Emulated
Differential I/O
Standards with
Three External
Output Resistor
Network
Emulated
Differential I/O
Standards with
One External
Output Resistor
Network
True Differential
I/O Standards
Emulated
Differential I/O
Standards
SERDES factor
J = 3 to 10
SERDES factor
J = 3 to 10
J = 2, Uses DDR
X
SERDES factor
SERDES factor
J = 1, Uses an
SDR Register
output duty
Conditions
Registers
—
—
150
(4)
(4)
(4)
(4)
—
—
45
—
—
—
—
—
—
—
—
—
—
50
—
—
—
—
—
—
—
—
—
—
—
C2
10000
1600
311
160
160
310
460
100
250
300
0.1
(6)
(6)
(6)
55
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
150
(4)
(4)
(4)
(4)
—
—
45
—
—
—
—
—
—
—
C3, I3
—
—
—
50
—
—
—
—
—
—
—
—
—
—
—
(Note
10000
1250
200
160
200
310
500
100
250
300
0.1
(6)
(6)
(6)
55
1),
(2)
150
(4)
(4)
(4)
(4)
—
—
45
—
—
—
—
—
—
—
(Part 2 of 3)
C4, I4
—
—
—
—
50
—
—
—
—
—
—
—
—
—
—
© July 2010 Altera Corporation
10000
1250
300
200
160
200
350
500
100
250
0.1
(6)
(6)
(6)
55
Switching Characteristics
150
(4)
(4)
(4)
(4)
—
—
45
—
—
—
—
—
—
—
C4L, I4L
—
—
—
50
—
—
—
—
—
—
—
—
—
—
—
10000
1250
200
160
200
350
500
100
250
300
0.1
(6)
(6)
(6)
55
± PPM
Mbps
Mbps
Mbps
Mbps
Mbps
ps
UI
ps
ps
ps
ps
ps
UI
%