EP3SL150F780C4N Altera, EP3SL150F780C4N Datasheet - Page 206
EP3SL150F780C4N
Manufacturer Part Number
EP3SL150F780C4N
Description
IC STRATIX III FPGA 150K 780FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
4.EP3SL150F780C4N.pdf
(341 pages)
Specifications of EP3SL150F780C4N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
488
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Stratix III
Number Of Logic Blocks/elements
142500
# I/os (max)
488
Frequency (max)
450MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.1V
Logic Cells
142500
Ram Bits
6543360
Operating Supply Voltage (min)
1.05V
Operating Supply Voltage (max)
1.15V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2403
EP3SL150F780C4NES
EP3SL150F780C4NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F780C4N
Manufacturer:
ALTERA
Quantity:
3 000
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7–2
Stratix III I/O Standards Support
Stratix III Device Handbook, Volume 1
Stratix III devices support a wide range of industry I/O standards.
I/O standards supported by Stratix III devices as well as typical applications.
Stratix III devices support V
Table 7–1. I/O Standard Applications for Stratix III Devices (Part 1 of 2)
Differential SSTL-18 Class II
Differential SSTL-15 Class II
Differential HSTL-18 Class II
Differential HSTL-15 Class II
Differential HSTL-12 Class II
Differential SSTL-18 Class I
Differential SSTL-15 Class I
Differential HSTL-18 Class I
Differential HSTL-15 Class I
Differential HSTL-12 Class I
Differential SSTL-2 Class II
Differential SSTL-2 Class I
3.3-V LVTTL/LVCMOS
3.0-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVTTL/LVCMOS
1.2-V LVTTL/LVCMOS
SSTL-18 Class II
SSTL-15 Class II
HSTL-18 Class II
HSTL-15 Class II
HSTL-12 Class II
HSTL-18 Class I
HSTL-15 Class I
HSTL-12 Class I
SSTL-18 Class I
SSTL-15 Class I
SSTL-2 Class II
SSTL-2 Class I
I/O Standard
3.0-V PCI-X
3.0-V PCI
RSDS
LVDS
CCIO
voltage levels of 3.3, 3.0, 2.5, 1.8, 1.5, and 1.2 V.
High-speed communications
QDR II/QDR II+/RLDRAM II
QDR II/QDR II+/RLDRAM II
PC and embedded system
PC and embedded system
Chapter 7: Stratix III Device I/O Features
Typical Application
QDR II/RLDRAM II
QDR II/RLDRAM II
Flat panel display
General purpose
General purpose
General purpose
General purpose
General purpose
General purpose
General purpose
General purpose
Clock interfaces
Clock interfaces
Clock interfaces
Clock interfaces
Clock interfaces
Clock interfaces
DDR2 SDRAM
DDR2 SDRAM
DDR3 SDRAM
DDR3 SDRAM
DDR2 SDRAM
DDR2 SDRAM
DDR3 SDRAM
DDR3 SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
© July 2010 Altera Corporation
Stratix III I/O Standards Support
Table 7–1
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