EP3SL150F780C4N Altera, EP3SL150F780C4N Datasheet - Page 354

• Manufacturer Part Number: EP3SL150F780C4N
• Description: IC STRATIX III FPGA 150K 780FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F780C4N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 488
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Stratix III
• Number Of Logic Blocks/elements: 142500
• # I/os (max): 488
• Frequency (max): 450MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.1V
• Logic Cells: 142500
• Ram Bits: 6543360
• Operating Supply Voltage (min): 1.05V
• Operating Supply Voltage (max): 1.15V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2403; EP3SL150F780C4NES

11–22
Stratix III Device Handbook, Volume 1
If the configuration bitstream size exceeds the capacity of a serial configuration
device, you must select a larger configuration device, enable the compression feature,
or both. When configuring multiple devices, the size of the bitstream is the sum of the
individual devices’ configuration bitstreams.
A system may have multiple devices that contain the same configuration data. In
active serial chains, you can implement this by storing one copy of the SOF in the
serial configuration device. The same copy of the SOF configures the master Stratix III
device and all remaining slave devices concurrently. All Stratix III devices must be the
same density and package. The master device is set up in active serial mode and the
slave devices are set up in passive serial mode.
To configure four identical Stratix III devices with the same SOF, you could set up the
chain similar to the example shown in
device, and its MSEL pins should be set to select AS configuration. The other three
slave devices are set up for concurrent configuration, and their MSEL pins should be
set to select PS configuration. The nCE input pins from the master and slave are
connected to GND, and the DATA and DCLK pins connect in parallel to all four devices.
During the configuration cycle, the master device reads its configuration data from
the serial configuration device and transmits the second copy of the configuration
data to all three slave devices, configuring all of them simultaneously.
Figure
Fast Active Serial Configuration (Serial Configuration Devices)
11–10. The first device is the master
Chapter 11: Configuring Stratix III Devices
© March 2011 Altera Corporation