EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 57

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–46. EP3SL50 Row Pins Input Timing Parameters (Part 1 of 2)
© July 2010 Altera Corporation
LVDS
MINI-LVDS
RSDS
DIFFERENTIAL
1.2-V
HSTL CLASS I
DIFFERENTIAL
1.2-V
HSTL CLASS II
DIFFERENTIAL
1.5-V
HSTL CLASS I
DIFFERENTIAL
1.5-V
HSTL CLASS II
DIFFERENTIAL
1.8-V
HSTL CLASS I
I/O Standard
Clock
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
Table 1–46
standards.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
su
su
su
su
su
su
su
su
su
su
su
su
su
su
h
h
h
h
h
h
h
h
h
h
h
h
h
h
h
h
Industrial
-0.919
-0.625
-0.919
-0.625
-0.919
-0.625
-0.734
-0.827
-0.734
-0.827
-0.743
-0.818
-0.743
-0.818
-0.757
-0.804
1.042
0.882
1.042
0.882
1.042
0.882
0.850
1.077
0.850
1.077
0.859
1.068
0.859
1.068
0.873
1.054
Fast Model
lists the EP3SL50 row pins input timing parameters for differential I/O
Commercial
-0.939
-0.625
-0.939
-0.625
-0.939
-0.625
-0.764
-0.819
-0.764
-0.819
-0.776
-0.807
-0.776
-0.807
-0.788
-0.795
1.077
0.896
1.077
0.896
1.077
0.896
0.893
1.081
0.893
1.081
0.905
1.069
0.905
1.069
0.917
1.057
-0.988 -0.952 -1.089 -1.040 -1.316 -0.916 -1.048 -1.000 -1.349
-1.430 -1.749 -1.896 -1.802 -1.817 -1.783 -1.936 -1.843 -1.865
-0.988 -0.952 -1.089 -1.040 -1.316 -0.916 -1.048 -1.000 -1.349
-1.430 -1.749 -1.896 -1.802 -1.817 -1.783 -1.936 -1.843 -1.865
-0.988 -0.952 -1.089 -1.040 -1.316 -0.916 -1.048 -1.000 -1.349
-1.430 -1.749 -1.896 -1.802 -1.817 -1.783 -1.936 -1.843 -1.865
-1.085 -1.186 -1.286 -1.234 -1.505 -1.193 -1.291 -1.242 -1.543
-1.375 -1.570 -1.756 -1.667 -1.687 -1.565 -1.751 -1.663 -1.730
-1.085 -1.186 -1.286 -1.234 -1.505 -1.193 -1.291 -1.242 -1.543
-1.375 -1.570 -1.756 -1.667 -1.687 -1.565 -1.751 -1.663 -1.730
-1.094 -1.196 -1.302 -1.250 -1.521 -1.202 -1.307 -1.258 -1.559
-1.366 -1.560 -1.740 -1.651 -1.671 -1.556 -1.735 -1.647 -1.714
-1.094 -1.196 -1.302 -1.250 -1.521 -1.202 -1.307 -1.258 -1.559
-1.366 -1.560 -1.740 -1.651 -1.671 -1.556 -1.735 -1.647 -1.714
-1.107 -1.206 -1.320 -1.268 -1.539 -1.213 -1.324 -1.275 -1.576
-1.354 -1.550 -1.722 -1.633 -1.653 -1.545 -1.718 -1.630 -1.697
1.209
1.863
1.209
1.863
1.209
1.863
1.274
1.776
1.274
1.776
1.283
1.767
1.283
1.767
1.295
1.754
1.1 V
V
C2
CCL
=
1.205
2.243
1.205
2.243
1.205
2.243
1.394
2.019
1.394
2.019
1.404
2.009
1.404
2.009
1.414
1.999
1.1 V
V
C3
CCL
=
1.369
2.446
1.369
2.446
1.369
2.446
1.516
2.257
1.516
2.257
1.532
2.241
1.532
2.241
1.550
2.223
1.1 V
V
C4
CCL
=
1.306
2.322
1.306
2.322
1.306
2.322
1.451
2.138
1.451
2.138
1.467
2.122
1.467
2.122
1.485
2.104
1.1 V
V
CCL
=
C4L
1.580
2.342
1.580
2.342
1.580
2.342
1.720
2.163
1.720
2.163
1.736
2.147
1.736
2.147
1.754
2.129
0.9 V
V
Stratix III Device Handbook, Volume 2
CCL
=
1.182
2.291
1.182
2.291
1.182
2.291
1.410
2.024
1.410
2.024
1.419
2.015
1.419
2.015
1.430
2.004
1.1 V
V
I3
CCL
=
1.339
2.500
1.339
2.500
1.339
2.500
1.531
2.263
1.531
2.263
1.547
2.247
1.547
2.247
1.564
2.230
1.1 V
V
I4
CCL
=
1.280
2.376
1.280
2.376
1.280
2.376
1.470
2.144
1.470
2.144
1.486
2.128
1.486
2.128
1.503
2.111
1.1 V
V
CCL
1–57
=
I4L
1.613
2.393
1.613
2.393
1.613
2.393
1.758
2.209
1.758
2.209
1.774
2.193
1.774
2.193
1.791
2.176
0.9 V
V
CCL
=
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns