EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 114

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

5–8
Operational Modes Overview
Table 5–2. Stratix III DSP Block Operation Modes
Stratix III Device Handbook, Volume 1
Notes to
(1) This mode also supports the loopback mode. In loopback mode, the number of loopback multipliers per DSP block is two and the remaining
(2) The dynamic shift mode supports arithmetic shift left, arithmetic shift right, logical shift left, logical shift right, and rotation operation.
(3) The dynamic shift mode operates on a 32-bit input vector but the multiplier width is configured as 36-bits.
(4) Unsigned value is also supported but you must make sure that the result can be contained within 36-bits.
Multiplier Adder
Four-Multiplier
High Precision
Two-Multiplier
Independent
Accumulate
Multiplier
Adder(1)
Shift
Multiply
multipliers can be used in regular Two-Multiplier Adder mode.
Mode
Adder
Table
(2)
5–2:
Multiplier in
18 × 36-bits
36-bits
12-bits
18-bits
36-bits
Double
18-bits
18-bits
18-bits
Width
9-bits
Each Stratix III DSP block can be used in one of five basic operational modes.
Table 5–2
be implemented within a single DSP block, depending on the mode.
The DSP block consists of two identical halves (top-half and bottom-half). Each half
has four 18 × 18 multipliers.
The Quartus
operation of the multipliers. After making the appropriate parameter settings using
the megafunction’s MegaWizard
automatically configures the DSP block.
Stratix III DSP blocks can operate in different modes simultaneously. Each half-block
is fully independent except for the sharing of the four clock, ena, and aclr signals.
For example, you can break down a single DSP block to operate a 9 × 9 multiplier in
one Half-Block and an 18 × 18 two-multiplier adder in the other Half-Block. This
increases DSP block resource efficiency and allows you to implement more
multipliers within a Stratix III device. The Quartus II software automatically places
multipliers that can share the same DSP block resources within the same block.
(3)
lists the five basic operational modes and the number of multipliers that can
Mults
# of
1
1
1
1
1
2
4
2
4
1
®
II software includes megafunctions used to control the mode of
Block
# per
8
6
4
2
2
4
2
2
2
2
Signed
Signed or
Unsigned
Both
Both
Both
Both
Both
Both
Both
Both
Both
(4)
TM
Plug-In Manager, the Quartus II software
RND,
SAT
Yes
Yes
Yes
Yes
No
No
No
No
No
No
Register
In Shift
Yes
Yes
Yes
No
No
No
No
No
No
No
Chapter 5: DSP Blocks in Stratix III Devices
Chainout
Adder
Yes
Yes
No
No
No
No
No
No
No
—
© March 2010 Altera Corporation
Operational Modes Overview
1st Stage
Add/Sub
Both
Both
Both
—
—
—
—
—
—
—
Add Only
Add Only
Add/Acc
Stage
Both
2nd
—
—
—
—
—
—
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