EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 196
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
Quantity:
490
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6–48
Table 6–18. loop_filter_r Bit Settings
Stratix III Device Handbook, Volume 1
LFR[4]
0
0
0
0
1
1
1
1
1
1
1
Charge Pump and Loop Filter
You can reconfigure the charge-pump and loop-filter settings to update the PLL
bandwidth in real time.
settings for charge pump current (I
for Stratix III PLLs.
Table 6–17. charge_pump_current Bit Settings
Table 6–19. loop_filter_c Bit Settings
LFR[3]
0
0
0
1
0
0
0
1
1
1
1
CP[2]
0
0
0
1
LFC[1]
0
0
1
LFR[2]
0
0
1
0
0
0
1
0
0
1
1
Table
CP[1]
6–17,
0
0
1
1
cp
Table
), loop-filter resistor (R), and capacitor (C) values
LFR[1]
LFC[0]
0
1
0
0
0
1
0
0
1
0
1
6–18, and
0
1
1
Chapter 6: Clock Networks and PLLs in Stratix III Devices
CP[0]
Table 6–19
0
1
1
1
LFR[0]
0
1
0
0
0
1
0
0
1
0
0
Decimal Value for Setting
© July 2010 Altera Corporation
list the possible
Decimal Value for
PLLs in Stratix III Devices
Decimal Value for
0
1
3
Setting
Setting
0
3
7
1
16
19
20
24
27
28
30
0
3
4
8
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