EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 212

IC STRATX III FPGA 150K 1152FBGA

EP3SL150F1152C3N

Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr

Specifications of EP3SL150F1152C3N

Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES

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7–8
Stratix III Device Handbook, Volume 1
Figure 7–2. Number of I/Os in Each Bank in EP3SL50, EP3SL70, and EP3SE50 Devices in 484-Pin
FineLine BGA Package
Notes to
(1) All I/O pin counts include dedicated clock inputs pins. The pin count includes all general purpose I/O, dedicated clock
(2)
pins, and dual-purpose configuration pins. Transceiver pins and dedicated configuration pins are not included in the
pin count.
Figure 7–2
representation only.
Figure
is a top view of the silicon die that corresponds to a reverse view for flip chip packages. It is a graphical
7–2:
(Note
Number
of I/Os
24
26
26
24
1), (2),
Name
Bank
Bank 1A
Bank 1C
Bank 2C
Bank 2A
EP3SL50
EP3SL70
EP3SE50
Bank 6A
Bank 6C
Bank 5C
Bank 5A
Name
Bank
Chapter 7: Stratix III Device I/O Features
Number
of I/Os
24
24
26
26
© July 2010 Altera Corporation
Stratix III I/O Banks

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