EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 225

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

Chapter 7: Stratix III Device I/O Features
OCT Support
© July 2010
Altera Corporation
Figure 7–8. On-Chip Series Termination without Calibration for Stratix III Devices
To use OCT for the SSTL Class I standard, you should select the 50-Ω on-chip series
termination setting, eliminating the external 25-Ω R
line). For the SSTL Class II standard, you should select the 25-Ω on-chip series
termination setting (to match the 50-Ω transmission line and the near-end external
50-Ω pull-up to V
On-Chip Series Termination with Calibration
Stratix III devices support OCT R
calibration circuit compares the total impedance of the I/O buffer to the external
25-Ω ±1% or 50-Ω ±1% resistors connected to the RUP and RDN pins, and dynamically
enables or disables the transistors until they match. The R
intrinsic impedance of transistors. Calibration occurs at the end of device
configuration. When the calibration circuit finds the correct impedance, it powers
down and stops changing the characteristics of the drivers. When calibration is not
taking place, the RUP and RDN pins go to a tri-state condition.
Figure 7–9. On-Chip Series Termination with Calibration for Stratix III Devices
Table 7–8
lists I/O standards that support OCT R
Series Termination
Series Termination
TT
Stratix III Driver
Stratix III Driver
).
V
V
GND
GND
CCIO
CCIO
R
R
R
R
S
S
S
S
S
with calibration in all banks. The OCT R
Z
Z
O
O
= 50 Ω
= 50 Ω
S
with calibration.
S
(to match the 50-Ω transmission
Receiving
Receiving
S
Device
Device
Stratix III Device Handbook, Volume 1
shown in
Figure 7–9
S
is the
7–21