EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 305

IC STRATX III FPGA 150K 1152FBGA

EP3SL150F1152C3N

Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr

Specifications of EP3SL150F1152C3N

Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES

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Chapter 9: High-Speed Differential I/O Interfaces and DPA in Stratix III Devices
Programmable Pre-Emphasis and Programmable V
Programmable Pre-Emphasis and Programmable V
Figure 9–10. Programmable V
© July 2010
Altera Corporation
OUT
OUT
Stratix III LVDS transmitters support programmable pre-emphasis and
programmable voltage output differential (V
amplitude of the high frequency component of the output signal, and thus helps
compensate for the frequency dependent attenuation along the transmission line.
Figure 9–10
pre-emphasis. This overshoot should not be included in the V
definition of V
Pre-emphasis is an important feature for high-speed transmission. Without
pre-emphasis, the output current is limited by the V
impedance of the driver. At high frequency, the slew rate may not be fast enough to
reach the full V
With pre-emphasis, the output current is boosted momentarily during switching to
increase the output slew rate. The overshoot introduced by the extra current happens
only during switching and does not ring, unlike the overshoot caused by signal
reflection. The amount of pre-emphasis required depends on the attenuation of the
high-frequency component along the transmission line.
Stratix III pre-emphasis is programmable to create the right amount of overshoot at
different transmission conditions. There are four settings for pre-emphasis: zero, low,
medium, and high. The default setting is low. In the Quartus II Assignment Editor,
pre-emphasis settings are represented in numbers with 0 (zero), 1 (low), 2 (medium)
and 3 (high). For a particular design, simulation with an LVDS buffer and
transmission line can be used to determine the best pre-emphasis setting.
The V
and high. The default setting is medium low. In the Quartus II Assignment Editor,
programmable V
2 (medium high) and 3 (high).
OD
OD
is also programmable with four settings: low, medium low, medium high,
shows an LVDS output with pre-emphasis. The overshoot is produced by
OD
OD
OD
OD
is also shown in
before the next edge, producing a pattern dependent jitter.
settings are represented in numbers with 0 (low), 1 (medium low),
V
Figure
OD
Overshoot
Overshoot
9–10.
OD
). Pre-emphasis increases the
OD
OD
setting and the output
Stratix III Device Handbook, Volume 1
OD
voltage. The
9–11

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