EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 315

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

Chapter 9: High-Speed Differential I/O Interfaces and DPA in Stratix III Devices
Differential Pin Placement Guidelines
Figure 9–19. Center Left/Right PLLs Driving DPA-Enabled Differential I/Os
© July 2010
Altera Corporation
(PLL_L2/PLL_R2)
(PLL_L3/PLL_R3)
Using Both Center Left/Right PLLs
Both center left/right PLLs can be used to drive DPA-enabled channels
simultaneously, as long as they drive these channels in their adjacent banks only, as
shown in
If one of the center left/right PLLs drive the top and bottom banks, the other center
left/right PLL cannot be used to drive the differential channels, as shown in
Figure
If the top PLL_L2/PLL_R2 drives DPA-enabled channels in the lower differential
bank, the PLL_L3/PLL_R3 cannot drive DPA-enabled channels in the upper
differential banks and vice versa. In other words, the center left/right PLLs cannot
drive cross-banks simultaneously, as shown in
Left/Right PLL
Left/Right PLL
DPA-enabled
DPA-enabled
DPA-enabled
DPA-enabled
DPA-enabled
DPA-enabled
DPA-enabled
DPA-enabled
Reference
Reference
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Center
Center
CLK
CLK
9–19.
Figure
9–19.
Figure
(PLL_L3/PLL_R3)
(PLL_L2/PLL_R2)
Left/Right PLL
DPA-enabled
DPA-enabled
DPA-enabled
DPA-enabled
DPA-enabled
Reference
Left/Right PLL
DPA-enabled
DPA-enabled
DPA-enabled
Reference
9–20.
CLK
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Center
Diff I/O
Diff I/O
Center
CLK
Stratix III Device Handbook, Volume 1
Unused
PLL
9–21