EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 336

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

11–4
Configuration Data Decompression
Stratix III Device Handbook, Volume 1
1
1
Stratix III devices support configuration data decompression, which saves
configuration memory space and time. This feature allows you to store compressed
configuration data in configuration devices or other memory and transmit this
compressed bitstream to Stratix III devices. During configuration, the Stratix III
device decompresses the bitstream in real time and programs its SRAM cells.
Preliminary data indicates that compression typically reduces the configuration
bitstream size by 35 to 55%, based on the designs used.
Stratix III devices support decompression in the FPP (when using a MAX II
device/microprocessor + flash), fast AS, and PS configuration schemes. The Stratix III
decompression feature is not available in the JTAG configuration scheme.
When using FPP mode, the intelligent host must provide a DCLK that is ×4 the data
rate. Therefore, the configuration data must be valid for four DCLK cycles.
In PS mode, use the Stratix III decompression feature, because sending compressed
configuration data reduces configuration time.
When you enable compression, the Quartus II software generates configuration files
with compressed configuration data. This compressed file reduces the storage
requirements in the configuration device or flash memory, and decreases the time
needed to transmit the bitstream to the Stratix III device. The time required by a
Stratix III device to decompress a configuration file is less than the time needed to
transmit the configuration data to the device.
There are two ways to enable compression for Stratix III bitstreams: before design
compilation (in the Compiler Settings menu) and after design compilation (in the
Convert Programming Files window).
To enable compression in the project's Compiler Settings menu, perform the following
steps:
1. On the Assignments menu, click Device. The Settings dialog box appears.
2. In the Family list, select Stratix III and then click the Device and Pin Options
3. On the Configuration tab, turn on the Generate compressed bitstreams
button.
option(Figure
11–1).
Chapter 11: Configuring Stratix III Devices
© March 2011 Altera Corporation
Configuration Features