EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 394

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

12–10
Table 12–3. Remote System Upgrade Control Register Contents (Part 2 of 2)
Stratix III Device Handbook, Volume 1
Wd_en
Wd_timer[11..0]
Notes to
(1) In remote update mode, the remote configuration block does not update the AnF bit automatically (you can update it manually).
(2) This is the default value of the control register bit.
Control Register Bit
Table
12–3:
Remote System Upgrade Status Register
The remote system upgrade status register specifies the reconfiguration trigger
condition. The various trigger and error conditions include in the following:
■
■
■
■
■
Figure 12–7
the figure show the bit positions within a 5-bit register.
Figure 12–7. Remote System Upgrade Status Register
Table 12–4. Remote System Upgrade Status Register Contents
CRC (from configuration)
nSTATUS
CORE_nCONFIG
nCONFIG
Wd
Note to
(1) Logic array reconfiguration forces the system to load the application configuration data into the Stratix III device.
Remote update
Remote update
Cyclic redundancy check (CRC) error during application configuration
nSTATUS assertion by an external device due to an error
Stratix III device logic array triggers a reconfiguration cycle, possibly after
downloading a new application configuration image
External configuration reset (nCONFIG) assertion
User watchdog timer time out
This occurs after the factory configuration specifies the appropriate application configuration page address by
updating the update register.
Remote System
Upgrade Mode
Status Register Bit
Table
12–4:
and
Table 12–4
(1)
1'b0
12'b000000000000
Wd
4
specify the contents of the status register. The numbers in
Value
nCONFIG
3
Device logic array caused
Watchdog timer caused
(2)
nSTATUS caused
nCONFIG caused
CRC error caused
reconfiguration
reconfiguration
reconfiguration
reconfiguration
reconfiguration
Core_nCONFIG
Definition
Chapter 12: Remote System Upgrades with Stratix III Devices
2
User watchdog timer enable bit
User watchdog time-out value (most significant
12 bits of 29-bit count value:
{Wd_timer[11..0], 17'b0})
nSTATUS
1
Dedicated Remote System Upgrade Circuitry
CRC
Definition
0
© March 2010 Altera Corporation
POR Reset Value
1 bit '0'
1 bit '0'
1 bit '0'
1 bit '0'
1 bit '0'