EPF10K10LC84-4N Altera, EPF10K10LC84-4N Datasheet - Page 60
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EPF10K10LC84-4N
Manufacturer Part Number
EPF10K10LC84-4N
Description
IC FLEX 10K FPGA 84-PLCC
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K10LC84-4N
Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
6144
Number Of I /o
59
Number Of Gates
31000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1938
544-1938-5
544-1938
EPF10K10LC84-4N
544-1938-5
544-1938
EPF10K10LC84-4N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K10LC84-4N
Manufacturer:
FUJI
Quantity:
6 670
60
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
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t
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t
t
SU
H
PRE
CLR
CH
CL
IOD
IOC
IOCO
IOCOMB
IOSU
IOH
IOCLR
OD1
OD2
OD3
XZ
ZX1
ZX2
ZX3
INREG
IOFD
INCOMB
Table 32. LE Timing Microparameters (Part 2 of 2)
Table 33. IOE Timing Microparameters
Symbol
Symbol
LE register setup time for data and enable signals before clock; LE register
recovery time after asynchronous clear, preset, or load
LE register hold time for data and enable signals after clock
LE register preset delay
LE register clear delay
Minimum clock high time from clock pin
Minimum clock low time from clock pin
IOE data delay
IOE register control signal delay
IOE register clock-to-output delay
IOE combinatorial delay
IOE register setup time for data and enable signals before clock; IOE register
recovery time after asynchronous clear
IOE register hold time for data and enable signals after clock
IOE register clear time
Output buffer and pad delay, slow slew rate = off, V
Output buffer and pad delay, slow slew rate = off, V
Output buffer and pad delay, slow slew rate = on
IOE output buffer disable delay
IOE output buffer enable delay, slow slew rate = off, V
IOE output buffer enable delay, slow slew rate = off, V
IOE output buffer enable delay, slow slew rate = on
IOE input pad and buffer to IOE register delay
IOE register feedback delay
IOE input pad and buffer to FastTrack Interconnect delay
Note (1)
Parameter
Parameter
Note (1)
CCIO
CCIO
CCIO
CCIO
= V
= low voltage
= V
= low voltage
CCINT
CCINT
Altera Corporation
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
Conditions
Conditions
(2)
(3)
(4)
(2)
(3)
(4)