EP3C16F484C8N Altera, EP3C16F484C8N Datasheet - Page 184
![IC CYCLONE III FPGA 16K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C16F484C8N
Manufacturer Part Number
EP3C16F484C8N
Description
IC CYCLONE III FPGA 16K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10M164C8N.pdf
(350 pages)
7.EP3C16F484C8N.pdf
(274 pages)
Specifications of EP3C16F484C8N
Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
346
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
963
Family Type
Cyclone III
No. Of I/o's
346
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2474
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA
Quantity:
331
Company:
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA44
Quantity:
120
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
9–24
Cyclone III Device Handbook, Volume 1
1
1
During device configuration, Cyclone III devices read configuration data using the
parallel interface and configure their SRAM cells. This scheme is referred to as the AP
configuration scheme because the device controls the configuration interface. This
scheme contrasts with the FPP configuration scheme, where an external host controls
the interface.
AP Configuration Supported Flash Memory
The AP configuration controller in Cyclone III devices is designed to interface with
the Numonyx StrataFlash
StrataFlash Embedded Memory P33 flash family, which are two industry standard
flash families. Unlike serial configuration devices, both of the flash families supported
in the AP configuration scheme are designed to interface with microprocessors. By
configuring from an industry standard microprocessor flash which allows access to
the flash after entering user mode, the AP configuration scheme allows you to
combine configuration data and user data (microprocessor boot code) on the same
flash memory.
The Numonyx P30 and P33 flash families support a continuous synchronous burst
read mode at 40 MHz DCLK frequency for reading data from the flash. Additionally,
the Numonyx P30 and P33 flash families have identical pin-out and adopt similar
protocols for data access.
Cyclone III devices use a 40-MHz oscillator for the AP configuration scheme.
Table 9–11
configuration scheme.
Table 9–11. Supported Commodity Flash for the AP Configuration Scheme for Cyclone III
Devices
The AP configuration scheme of Cyclone III devices supports the Numonyx P30 and
P33 family 64-, 128-, and 256-Mbit flash memories. Configuring Cyclone III devices
from the Numonyx P30 and P33 family 512-Mbit flash memory is possible, but you
must properly drive the extra address and nCS pins as required by these flash
memories.
You must refer to the respective flash data sheets to check for supported speed grades
and package options.
Notes to
(1) The AP configuration scheme only supports flash memory speed grades of 40 MHz and above.
(2) 3.3- , 3.0-, 2.5-, and 1.8-V I/O options are supported for the Numonyx P30 flash family.
(3) 3.3-, 3.0- and 2.5-V I/O options are supported for the Numonyx P33 flash family.
Flash Memory Density
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Table
(Note 1)
128 Mbit
256 Mbit
lists the supported families of the commodity parallel flash for the AP
64 Mbit
9–11:
®
Embedded Memory P30 flash family and the Numonyx
Numonyx P30 Flash Family
v
v
v
(2)
© December 2009 Altera Corporation
Numonyx P33 Flash Family
Configuration Features
v
v
v
(3)