EP3C16F484C7N Altera, EP3C16F484C7N Datasheet - Page 21
![IC CYCLONE III FPGA 16K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C16F484C7N
Manufacturer Part Number
EP3C16F484C7N
Description
IC CYCLONE III FPGA 16K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10M164C8N.pdf
(350 pages)
7.EP3C16F484C7N.pdf
(274 pages)
Specifications of EP3C16F484C7N
Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
346
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
963
Family Type
Cyclone III
No. Of I/o's
346
I/o Supply Voltage
3.3V
Operating Frequency Max
437.5MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2473
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3C16F484C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 1: Cyclone III Device Family Overview
Cyclone III Device Family Architecture
Embedded Multipliers and Digital Signal Processing Support
Clock Networks and PLLs
© December 2009
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Altera Corporation
For more information about memory blocks, refer to the
Devices
Cyclone III devices support up to 288 embedded multiplier blocks and Cyclone III LS
devices support up to 396 embedded multiplier blocks. Each block supports one
individual 18 × 18-bit multiplier or two individual 9 × 9-bit multipliers.
The Quartus II software includes megafunctions that are used to control the operation
mode of the embedded multiplier blocks based on user parameter settings.
Multipliers can also be inferred directly from the VHDL or Verilog source code. In
addition to embedded multipliers, Cyclone III device family includes a combination
of on-chip resources and external interfaces, making them ideal for increasing
performance, reducing system cost, and lowering the power consumption of digital
signal processing (DSP) systems. You can use Cyclone III device family alone or as
DSP device co-processors to improve price-to-performance ratios of DSP systems.
The Cyclone III device family DSP system design support includes the following
features:
■
■
■
■
For more information about embedded multipliers and digital signal processing
support, refer to the
Cyclone III device family includes 20 global clock networks. You can drive global
clock signals from dedicated clock pins, dual-purpose clock pins, user logic, and
PLLs. Cyclone III device family includes up to four PLLs with five outputs per PLL to
provide robust clock management and synthesis. You can use PLLs for device clock
management, external system clock management, and I/O interfaces.
You can dynamically reconfigure the Cyclone III device family PLLs to enable
auto-calibration of external memory interfaces while the device is in operation. This
feature enables the support of multiple input source frequencies and corresponding
multiplication, division, and phase shift requirements. PLLs in Cyclone III device
family may be cascaded to generate up to ten internal clocks and two external clocks
on output pins from a single external clock source.
For more PLL specifications and information, refer to the
Cyclone III LS Device Data
chapters.
DSP IP cores:
■
■
Complete reference designs for end-market applications
DSP Builder interface tool between the Quartus II software and the MathWorks
Simulink and MATLAB design environments
DSP development kits
Common DSP processing functions such as finite impulse response (FIR), fast
Fourier transform (FFT), and numerically controlled oscillator (NCO) functions
Suites of common video and image processing functions
chapter.
Embedded Multipliers in Cyclone III Devices
Sheet, and
Clock Networks and PLLs in Cyclone III Devices
Memory Blocks in Cyclone III
Cyclone III Device Data
Cyclone III Device Handbook, Volume 1
chapter.
Sheet,
1–7