EP1S20F484C7 Altera, EP1S20F484C7 Datasheet - Page 166
EP1S20F484C7
Manufacturer Part Number
EP1S20F484C7
Description
IC STRATIX FPGA 20K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S20F484C7
Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
361
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
18460
# I/os (max)
361
Frequency (max)
420.17MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
18460
Ram Bits
1669248
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1101
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S20F484C7
Manufacturer:
ALTERA
Quantity:
3 000
Company:
Part Number:
EP1S20F484C7N
Manufacturer:
ALTERA
Quantity:
351
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Stratix Automated Single Event Upset (SEU) Detection
Stratix
Automated
Single Event
Upset (SEU)
Detection
3–12
Stratix Device Handbook, Volume 1
Local Update Mode
Local update mode is a simplified version of the remote update. This
feature is intended for simple systems that need to load a single
application configuration immediately upon power up without loading
the factory configuration first. Local update designs have only one
application configuration to load, so it does not require a factory
configuration to determine which application configuration to use.
Figure 3–4
Figure 3–4. Local Update Transition Diagram
Stratix devices offer on-chip circuitry for automated checking of single
event upset (SEU) detection. FPGA devices that operate at high elevations
or in close proximity to earth’s North or South Pole require periodic
checks to ensure continued data integrity. The error detection cyclic
redundancy check (CRC) feature controlled by the Device & Pin Options
dialog box in the Quartus II software uses a 32-bit CRC circuit to ensure
data reliability and is one of the best options for mitigating SEU.
nCONFIG
shows the transition diagram for local update mode.
Configuration
Error
or nCONFIG
Configuration
Configuration
Application
Power-Up
Factory
Configuration
Error
Altera Corporation
nCONFIG
July 2005
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