EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 58
EP2AGX65DF29C6N
Manufacturer Part Number
EP2AGX65DF29C6N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX65DF29C6N.pdf
(306 pages)
Specifications of EP2AGX65DF29C6N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
63250
# I/os (max)
364
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
63250
Ram Bits
5557452.8
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX65DF29C6N
Manufacturer:
ST
Quantity:
12 000
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3–18
Figure 3–19. Same Port Read-During-Write: Old Data Mode
Figure 3–20. Mixed Port Read During Write: Old Data Mode
Arria II GX Device Handbook, Volume 1
1
q_b_(asyn)
address_b
q_a (asyn)
address_a
address
bytenna
clk_a&b
bytenna
data_a
data_a
wrena
clk_a
rdena
rdenb
wrena
Figure 3–19
behavior in old data mode.
Mixed-Port Read-During-Write Mode
This mode applies to a RAM in simple or true dual-port mode which has one port
reading and the other port writing to the same address location with the same clock.
In this mode, you also have two output choices: old data or don’t care. In old data
mode, a read-during-write operation to different ports causes the RAM outputs to
reflect the old data at that address location. In don’t care mode, the same operation
results in a “don’t care” or “unknown” value on the RAM outputs.
Read-during-write behavior is controlled using the RAM MegaWizard Plug-In
Manager. For more information about how to implement the desired behavior, refer to
the
Figure 3–20
behavior in old data mode. In don’t care mode, the old data shown in
simply replaced with “don’t care”.
RAM Megafunction User
shows sample functional waveforms of same-port read-during-write
shows a sample functional waveform of mixed-port read-during-write
A123
AAAA
01
11
A0 (old data)
A0 (old data)
BBBB
B456
10
01
A0
D
A0
A0
old
Guide.
AAAA
D
old
23
CCCC
C789
00
10
B423
AABB
DDDD
DDDD
A1(old data)
A1(old data)
Chapter 3: Memory Blocks in Arria II GX Devices
A1
EEEE
EEEE
11
11
A1
A1
DDDD
DDDD
© November 2009 Altera Corporation
FFFF
FFFF
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Design Considerations
Figure 3–20
is
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