EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 260

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

8–20
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Differential I/O Termination
f
The Arria II device family provides a 100-Ω R
receiver channel for LVDS standards. OCT saves board space by eliminating the need
to add external resistors on the board. You can enable OCT in the Quartus II software
Assignment Editor.
For Arria II GX devices, OCT is supported in the top, right, and bottom I/O banks.
Arria II GX clock input pins (CLK[4..15]) do not support OCT. For Arria II GZ
devices, R
(CLK[0,2,9,11]). It is not supported for column I/O pins and dedicated clock input
pins (CLK[1,3,8,10]).
Figure 8–16
Figure 8–16. LVDS Input Buffer I/O R
Table 8–7
Quartus II software Assignment Editor.
Table 8–7. Differential Input OCT in Quartus II Software Assignment Editor
For more information, refer to
Input Termination (Accepts wildcards/groups)
lists the assignment name and its value for differential input OCT in the
D
OCT is supported on all row I/O pins and dedicated clock input pins
shows LVDS input OCT.
Assignment Name
Transmitter
LVDS
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Arria II Devices
I/O Features in Arria II Devices
D
OCT
Z
Z
0
0
= 50 Ω
= 50 Ω
D
OCT option on each differential
Arria II Differential
R
Receiver with
D
R
= 100 Ω OCT
D
December 2010 Altera Corporation
chapter.
Assignment Value
Differential
Differential Receiver