EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 421
EP2AGX65DF29C6N
Manufacturer Part Number
EP2AGX65DF29C6N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX65DF29C6N.pdf
(306 pages)
Specifications of EP2AGX65DF29C6N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
63250
# I/os (max)
364
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
63250
Ram Bits
5557452.8
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX65DF29C6N
Manufacturer:
ST
Quantity:
12 000
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Chapter 1: Transceiver Architecture in Arria II Devices
Receiver Channel Datapath
Figure 1–35. Word Aligner in 10-Bit PMA-PCS Manual Alignment Mode
Figure 1–36. Manual Alignment Mode Word Aligner in 16-Bit PMA-PCS Interface Modes
December 2010 Altera Corporation
rx_enapatternalign
rx_patterndetect
rx_dataout[19:0]
rx_syncstatus
rx_clock
rx_patterndetect[1:0]
rx_enapatternalign
rx_syncstatus[1:0]
With a 16- or 20-bit width data, the word aligner starts looking for the programmed
8-bit, 16-bit, or 32-bit word alignment pattern in the received data stream as soon as
rx_digitalreset is de-asserted low. It aligns to the first word alignment pattern
received regardless of the logic level driven on the rx_enapatternalign signal. Any
word alignment pattern received thereafter in a different word boundary does not
cause the word aligner to re-align to this new word boundary. After the initial word
alignment, following de-assertion of the rx_digitalreset signal, if a word
re-alignment is required, you must use the rx_enapatternalign signal.
Figure 1–36
PMA-PCS interface mode.
rx_digitalreset
111110000
rx_dataout
n
0101111100
shows the manual alignment mode word aligner operation in 16-bit
n + 1
00
00
111110000
xxxx
n + 2
F628
10
10
n
1111001010 1000000101
11
n + 1
xxxx
n + 3
n + 2
xxxx
00
00
xxxx
n + 3
n + 4
Arria II Device Handbook Volume 2: Transceivers
111110000
F628
n + 4
10
10
xxxx
n + 5
0101111100
11
00
xxxx
1–35
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