EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 60

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

3–14
Figure 3–13. Simple Dual-Port Timing Waveforms for M9K and M144K Blocks
Figure 3–14. Simple Dual-Port Timing Waveforms for MLABs
Arria II Device Handbook Volume 1: Device Interfaces and Integration
q (asynch)
q (asynch)
wraddress
wraddress
rdaddress
rdaddress
wrclock
rdclock
wrclock
rdclock
wren
data
rden
data
rden
wren
din-1
doutn-1
Figure 3–13
dual-port mode with unregistered outputs for M9K and M144K blocks. Registering
the M9K and M144K block outputs delay the q output by one clock cycle.
an-1
Figure 3–14
dual-port mode with unregistered outputs in the MLAB. The write operation is
triggered by the falling clock edges.
din-1
doutn-1
an-1
bn
bn
an
an
din
din
shows timing waveforms for read and write operations in simple
shows the timing waveforms for read and write operations in simple
doutn
doutn
b0
a0
a0
b0
a1
a1
dout0
dout0
a2
b1
a2
b1
a3
a3
Chapter 3: Memory Blocks in Arria II Devices
din4
din4
a4
b2
a4
b2
December 2010 Altera Corporation
din5
a5
din5
a5
b3
b3
din6
a6
din6
a6
Memory Modes