EPF10K130EQI240-2 Altera, EPF10K130EQI240-2 Datasheet - Page 8
![IC FLEX 10KE FPGA 130K 240-PQFP](/photos/6/72/67260/544-240-pqfp_sml.jpg)
EPF10K130EQI240-2
Manufacturer Part Number
EPF10K130EQI240-2
Description
IC FLEX 10KE FPGA 130K 240-PQFP
Manufacturer
Altera
Series
FLEX-10KE®r
Datasheet
1.EPF10K30ETC144-3.pdf
(100 pages)
Specifications of EPF10K130EQI240-2
Number Of Logic Elements/cells
6656
Number Of Labs/clbs
832
Total Ram Bits
65536
Number Of I /o
186
Number Of Gates
342000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
240-MQFP, 240-PQFP
Family Name
FLEX 10KE
Number Of Usable Gates
130000
Number Of Logic Blocks/elements
6656
# Registers
186
# I/os (max)
186
Frequency (max)
333.33MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
6656
Ram Bits
65536
Device System Gates
342000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2206
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPF10K130EQI240-2
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Functional
Description
8
Each FLEX 10KE device contains an enhanced embedded array to
implement memory and specialized logic functions, and a logic array to
implement general logic.
The embedded array consists of a series of EABs. When implementing
memory functions, each EAB provides 4,096 bits, which can be used to
create RAM, ROM, dual-port RAM, or first-in first-out (FIFO) functions.
When implementing logic, each EAB can contribute 100 to 600 gates
towards complex logic functions, such as multipliers, microcontrollers,
state machines, and DSP functions. EABs can be used independently, or
multiple EABs can be combined to implement larger functions.
The logic array consists of logic array blocks (LABs). Each LAB contains
eight LEs and a local interconnect. An LE consists of a four-input look-up
table (LUT), a programmable flipflop, and dedicated signal paths for carry
and cascade functions. The eight LEs can be used to create medium-sized
blocks of logic—such as 8-bit counters, address decoders, or state
machines—or combined across LABs to create larger logic blocks. Each
LAB represents about 96 usable gates of logic.
Signal interconnections within FLEX 10KE devices (as well as to and from
device pins) are provided by the FastTrack Interconnect routing structure,
which is a series of fast, continuous row and column channels that run the
entire length and width of the device.
Each I/O pin is fed by an I/O element (IOE) located at the end of each row
and column of the FastTrack Interconnect routing structure. Each IOE
contains a bidirectional I/O buffer and a flipflop that can be used as either
an output or input register to feed input, output, or bidirectional signals.
When used with a dedicated clock pin, these registers provide exceptional
performance. As inputs, they provide setup times as low as 0.9 ns and
hold times of 0 ns. As outputs, these registers provide clock-to-output
times as low as 3.0 ns. IOEs provide a variety of features, such as JTAG
BST support, slew-rate control, tri-state buffers, and open-drain outputs.
Altera Corporation