EP1S30B956C6 Altera, EP1S30B956C6 Datasheet - Page 69
EP1S30B956C6
Manufacturer Part Number
EP1S30B956C6
Description
IC STRATIX FPGA 30K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S30B956C6
Number Of Logic Elements/cells
32470
Number Of Labs/clbs
3247
Total Ram Bits
3317184
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1417
EP1S30SB956C6
EP1S30SB956C6
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S30B956C6
Manufacturer:
ALTERA
Quantity:
1 238
Company:
Part Number:
EP1S30B956C6
Manufacturer:
ALTERA
Quantity:
319
Part Number:
EP1S30B956C6
Manufacturer:
ALTERA
Quantity:
20 000
- Current page: 69 of 276
- Download datasheet (4Mb)
Figure 2–30. DSP Block Diagram for 18 × 18-Bit Configuration
Altera Corporation
July 2005
Optional Serial
Shift Register
Outputs to
Next DSP Block
in the Column
Optional Serial Shift Register
Inputs from Previous
DSP Block
D
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
ENA
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
Q
Q
Q
Q
Q
Q
Q
Q
Multiplier Stage
Optional Input Register
Stage with Parallel Input or
Shift Register Configuration
D
ENA
D
ENA
D
ENA
D
ENA
CLRN
CLRN
CLRN
CLRN
Q
Q
Q
Q
Optional Stage Configurable
as Accumulator or Dynamic
Adder/Subtractor
Optional Pipeline
Register Stage
Accumulator
Accumulator
Subtractor/
Subtractor/
Adder/
Adder/
1
2
Summation Stage
for Adding Four
Multipliers Together
Stratix Device Handbook, Volume 1
Summation
Output Selection
Multiplexer
to MultiTrack
Interconnect
Stratix Architecture
Optional Output
Register Stage
2–55
Related parts for EP1S30B956C6
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: