EP1S40F1020C5 Altera, EP1S40F1020C5 Datasheet - Page 80
EP1S40F1020C5
Manufacturer Part Number
EP1S40F1020C5
Description
IC STRATIX FPGA 40K LE 1020-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S40F1020C5
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
773
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
41250
# I/os (max)
773
Frequency (max)
500MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
41250
Ram Bits
3423744
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2089
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S40F1020C5
Manufacturer:
ALTERA
Quantity:
5 510
Company:
Part Number:
EP1S40F1020C5
Manufacturer:
XILINK
Quantity:
5 510
Company:
Part Number:
EP1S40F1020C5
Manufacturer:
ALTERA30
Quantity:
113
Part Number:
EP1S40F1020C5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP1S40F1020C5N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S40F1020C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Digital Signal Processing Block
Figure 2–36. 36 × 36 Multiply Mode
Notes to
(1)
(2)
2–66
Stratix Device Handbook, Volume 1
These signals are not registered or registered once to match the pipeline.
These signals are not registered, registered once, or registered twice for latency to match the pipeline.
A[35..18]
B[35..18]
A[35..18]
B[35..18]
A[17..0]
B[17..0]
B[17..0]
A[17..0]
Figure
2–36:
ENA
ENA
ENA
ENA
ENA
ENA
ENA
ENA
D
D
D
D
D
D
D
D
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
Q
Q
Q
Q
Q
Q
Q
Q
signa (1)
signb (1)
clock
aclr
ena
ENA
ENA
ENA
ENA
D
D
D
D
CLRN
CLRN
CLRN
CLRN
Q
Q
Q
Q
signa (2)
signb (2)
Multiplier
36 × 36
Adder
D
ENA
CLRN
Q
Altera Corporation
Data Out
July 2005