EP1SGX40GF1020C5N Altera, EP1SGX40GF1020C5N Datasheet - Page 11
EP1SGX40GF1020C5N
Manufacturer Part Number
EP1SGX40GF1020C5N
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX40GF1020C5N
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Transceiver
Blocks
Altera Corporation
June 2006
SGX51002-1.1
Stratix
right side of the device, which contains up to 20 high-speed 3.1875-Gbps
serial transceiver channels. Each Stratix GX transceiver block contains
four full-duplex channels and supporting logic to transmit and receive
high-speed serial data streams. The transceiver block uses the channels to
deliver bidirectional point-to-point data transmissions with up to
3.1875 Gbps of data transition per channel.
There are up to 20 transceiver channels available on a single Stratix GX
device.
each Stratix GX device.
Figure 2–1
channels, supporting logic, and I/O buffers. Each transceiver channel
consists of a receiver and transmitter. The supporting logic contains a
transmitter PLL to generate a high-speed clock used by the four
transmitters. The receiver PLL within each transceiver channel generates
the receiver reference clocks. The supporting logic also contains state
machines to manage rate matching for XAUI and GIGE applications, in
addition to channel bonding for XAUI applications.
Table 2–1. Stratix GX Transceiver Channels
®
Table 2–1
GX devices incorporate dedicated embedded circuitry on the
shows the elements of the transceiver block, including the four
EP1SGX10C
EP1SGX10D
EP1SGX25C
EP1SGX25D
EP1SGX40D
EP1SGX40G
EP1SGX25F
Device
shows the number of transceiver channels available on
2. Stratix GX Transceivers
Number of Transceiver Channels
16
20
4
8
4
8
8
2–1
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