XC3SD1800A-5CS484C Xilinx Inc, XC3SD1800A-5CS484C Datasheet - Page 69
![SPARTAN-3ADSP FPGA 1800K 484CSA](/photos/6/73/67348/pk223-cs484_sml.jpg)
XC3SD1800A-5CS484C
Manufacturer Part Number
XC3SD1800A-5CS484C
Description
SPARTAN-3ADSP FPGA 1800K 484CSA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3SD3400A-4FGG676C.pdf
(4 pages)
3.XC3SD3400A-4FGG676C.pdf
(101 pages)
Specifications of XC3SD1800A-5CS484C
Number Of Logic Elements/cells
37440
Number Of Labs/clbs
4160
Total Ram Bits
1548288
Number Of I /o
309
Number Of Gates
1800000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA, CSPBGA
For Use With
122-1574 - KIT DEVELOPMENT SPARTAN 3ADSP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3SD1800A-5CS484C
Manufacturer:
XILINX
Quantity:
648
Part Number:
XC3SD1800A-5CS484C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Table 63: Spartan-3A DSP CS484 Pinout (Cont’d)
DS610 (v3.0) October 4, 2010
Product Specification
Bank
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IP_2/VREF_2
IO_L24N_2/D3
IO_L29N_2
IO_L29P_2
IO_L26P_2/D2
IO_L26N_2/D1
VCCO_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
VCCO_2
IP_L39N_3/VREF_3
IO_L02N_3
IO_L02P_3
IP_L04P_3
IP_L08P_3
IP_L08N_3
IP_L04N_3/VREF_3
IO_L09P_3
IO_L09N_3
IO_L06N_3
IO_L06P_3
IO_L01P_3
IO_L03P_3
IO_L03N_3
IO_L11P_3
IO_L01N_3
IO_L07P_3
IO_L07N_3
IO_L11N_3
IO_L14P_3
IO_L05P_3
IO_L05N_3
IO_L10P_3
IO_L10N_3
IO_L14N_3/VREF_3
IP_L16P_3
IP_L16N_3
IP_L12P_3
IP_L12N_3/VREF_3
IO_L19P_3/LHCLK2
Pin Name
Y14
Y15
Y16
Y17
Y18
Y19
AA5
AA9
AA13
AA18
V9
V14
AA1
C1
C2
D1
D3
D4
E1
E3
E4
F1
F2
F3
F4
F5
G1
G3
G5
G6
H1
H2
H3
H4
H5
H6
J1
J3
J4
J6
J7
K1
CS484
Ball
VREF
DUAL
I/O
I/O
DUAL
DUAL
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VREF
I/O
I/O
INPUT
INPUT
INPUT
VREF
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VREF
INPUT
INPUT
INPUT
VREF
LHCLK
Type
www.xilinx.com
Table 63: Spartan-3A DSP CS484 Pinout (Cont’d)
Bank
Spartan-3A DSP FPGA Family: Pinout Descriptions
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IO_L17P_3
IO_L17N_3
IO_L13P_3
IO_L13N_3
IO_L15P_3
IO_L19N_3/IRDY2/LHCLK3
IO_L20P_3/LHCLK4
IO_L15N_3
IO_L18P_3/LHCLK0
IO_L22P_3/VREF_3
IO_L20N_3/LHCLK5
IP_L23P_3
IO_L18N_3/LHCLK1
IO_L21P_3/TRDY2/LHCLK6
IO_L22N_3
IP_L31P_3
IP_L23N_3
IO_L24N_3
IO_L24P_3
IO_L21N_3/LHCLK7
IO_L25P_3
IO_L25N_3
IP_L31N_3
IO_L32P_3/VREF_3
IO_L26P_3
IO_L28N_3
IO_L28P_3
IO_L34P_3
IO_L32N_3
IO_L26N_3
IO_L30P_3
IP_L27P_3
IO_L34N_3
IO_L29N_3
IO_L29P_3
IO_L30N_3
IO_L33P_3
IP_L27N_3
IO_L38P_3
IO_L38N_3
IO_L33N_3
IO_L36N_3
Pin Name
K2
K3
K4
K5
K6
L1
L3
L5
L6
M1
M2
M3
M5
M6
N1
N3
N4
N5
N6
N7
P1
P2
P3
P4
P6
R1
R2
R3
R5
R6
T1
T3
T4
T5
T6
U1
U2
U3
U4
U5
V1
V3
CS484
Ball
I/O
I/O
I/O
I/O
I/O
LHCLK
LHCLK
I/O
LHCLK
VREF
LHCLK
INPUT
LHCLK
LHCLK
I/O
INPUT
INPUT
I/O
I/O
LHCLK
I/O
I/O
INPUT
VREF
I/O
I/O
I/O
I/O
I/O
I/O
I/O
INPUT
I/O
I/O
I/O
I/O
I/O
INPUT
I/O
I/O
I/O
I/O
Type
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