XC4036XLA-09HQ240C Xilinx Inc, XC4036XLA-09HQ240C Datasheet - Page 3
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XC4036XLA-09HQ240C
Manufacturer Part Number
XC4036XLA-09HQ240C
Description
IC FPGA C 2.5V 288 I/O 240HQFP
Manufacturer
Xilinx Inc
Series
XC4000XLA/XVr
Datasheet
1.XC4028XLA-09HQ240I.pdf
(14 pages)
Specifications of XC4036XLA-09HQ240C
Number Of Logic Elements/cells
3078
Number Of Labs/clbs
1296
Total Ram Bits
41472
Number Of I /o
193
Number Of Gates
36000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-BFQFP Exposed Pad
Case
QFP240
Dc
02+
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
155001A
Q1155001A
XC4036XLA09HQ240C
Q1155001A
XC4036XLA09HQ240C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC4036XLA-09HQ240C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC4036XLA-09HQ240C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Three-State Register
XC4000XLA/XV devices incorporate an optional register
controlling the three-state enable in the IOBs.The use of
the three-state control register can significantly improve
output enable and disable time.
FastCLK Clock Buffers
The XLA/XV devices incorporate FastCLK clock buffers.
Two FastCLK buffers are available on each of the right and
left edges of the die. Each FastCLK buffer can provide a
fast clock signal (typically < 1.5 ns clock delay) to all the
IOBs within the IOB octant containing the buffer. The Fast-
CLK buffers can be instantiated by use of the BUFFCLK
symbols. (In addition to FastCLK buffers, the Global Early
BUFGE clock buffers #1, #2, #5, and #6 can also provide
fast clock signals (typically < 1.5 ns clock delay) to IOBs on
the top and bottom of the die.
XLA/XV Power Requirements
XC4000XLA devices require 40% less power per CLB than
equivalent XL devices. XC4000XV devices require 42%
less power per CLB than equivalent XLA devices and 65%
less power than XL devices The representative K-Factor for
the following families can be found in
predicts device current for typical user designs and is
based on filling the FPGA with active 16-Bit counters and
measuring the device current at 1 MHz. This technique is
described in XBRF14 “A Simple Method of Estimating
Power in XC4000XL/EX/E FPGAs”. To predict device
power (P) using the K-Factor use the following formula:
P=V*K*N*F; where:
P= Device Power
V= Power supply voltage
K= the Device K-Factor
N = number of active registers
F = Frequency in MHz
DS015 (v1.3) October 18, 1999 - Product Specification
R
Table
2. The K-Factor
XC4000XLA/XV Field Programmable Gate Arrays
Table 2: K-Factor and Relative Power.
XLA/XV Logic Performance
XC4000XLA/XV devices feature 30% faster device speed
than XL devices, and consistent performance is achieved
across all family members.
mance of the XLA devices. For details regarding the imple-
mentation of these benchmarks refer to XBRF15 “Speed
Metrics for High Performance FPGAs”.
Table 3: XLA/XV Estimated Benchmark Performance
FPGA Family
(Manhattan Distance)
XC4000XLA
XC4000XV
Register - Register
XC4000XL
2 Cascaded Adders
4 Cascaded Adders
Cascaded 4LUTs
Dual Port RAM
Benchmarks
Interconnect
(Pipelined)
Adder
K-Factor
28
17
13
8-Bits by 256
Table 3
8-Bits by 16
128 CLBs
16 CLBs
64 CLBs
1 CLBs
4 CLBs
Relative To
1 Level
2 Level
4 Level
6 Level
16-Bit
32-Bit
16-Bit
16-Bit
8-Bit
Size
Power
1.00
0.60
0.35
XL
illustrates the perfor-
Relative To
Frequency
Maximum
172 MHz
144 MHz
108 MHz
314 MHz
193 MHz
108 MHz
325 MHz
260 MHz
185 MHz
108 MHz
172 MHz
172 MHz
94 MHz
57 MHz
75 MHz
81 MHz
Power
XLA
1.65
1.00
0.58
6-159
6