PNX1502E/G,557 NXP Semiconductors, PNX1502E/G,557 Datasheet - Page 754
PNX1502E/G,557
Manufacturer Part Number
PNX1502E/G,557
Description
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1502E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.23 V ~ 1.37 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1298
935277748557
PNX1502E/G
935277748557
PNX1502E/G
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NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
Remark: All references to instruction and data registers refer to JTAG instructions
and data registers only (not TM3260 instruction or data registers).
Data Registers
There are two 32-bit data registers, TM_DBG_DATA_IN and TM_DBG_DATA_OUT in
the MMIO space. Both can be connected in between TDI and TDO like the standard
Bypass and Boundary-Scan registers of JTAG.
Control Registers
There are two control registers, TM_DBG_CTRL1 and TM_DBG_CTRL2, in MMIO
space.
Figure 3:
•
•
•
•
•
•
The TM_DBG_DATA_IN register can be read or written to via the JTAG port.
The TM_DBG_DATA_OUT register is read-only via the JTAG port, so that
scanning out TM_DBG_DATA_OUT is non-destructive.
The TM_DBG_DATA_IN and TM_DBG_DATA_OUT are readable/writable from
the TM3260 processor via the usual load/store operations.
The TM_DBG_CTRL registers are used for handshake between a debug monitor
running on a TM3260 CPU and a debugger front-end running on a host.
TM_DBG_CTRL1.ofull = 1 means that TM_DBG_DATA_OUT has valid data to be
scanned out. On the power-on reset of the PNX15xx/952x Series,
TM_DBG_CTRL1.ofull = 0. TM_DBG_CTRL1.ofull is both readable and writable
via the JTAG tap. Writing 0 to TM_DBG_CTRL1.ofull via JTAG is a “remember”
operation i.e., TM_DBG_CTRL1.ofull retains its previous state. Writing 1 to
TM_DBG_CTRL1.ofull via JTAG is a ‘clear’ operation i.e., TM_DBG_CTRL1.ofull
becomes 0.
TM_DBG_CTRL2.ifull = 0 means that the TM_DBG_DATA_IN register is empty.
TM_DBG_CTRL2.ifull = 1 means that TM_DBG_DATA_IN has valid data and the
debug monitor has not yet copied it to its private area. Upon power on reset of the
TM3260 processor, TM_DBG_CTRL2.ifull = 0. TM_DBG_CTRL2.ifull is readable
From TDI
Additional JTAG Data and Control Registers
Rev. 4.0 — 03 December 2007
31
31
Unused Bits
TM_DBG_DATA_OUT
TM_DBG_DATA_IN
TM_DBG_CTRL2
TM_DBG_CTRL1
Unused Bits
2
Sleepless
Bit
1
1
0
0
PNX15xx/952x Series
Chapter 24: TM3260 Debug
ofull
ifull
0
0
© NXP B.V. 2007. All rights reserved.
To TDO
24-754
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