EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 166

IC WEBSERVER 50MHZ 100LQFP

EZ80L92AZ050SG

Manufacturer Part Number
EZ80L92AZ050SG
Description
IC WEBSERVER 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80L92AZ050SG

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80L92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80L920210ZCO
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3878
EZ80L92AZ050SG

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80L92AZ050SG
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Everlight
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Part Number:
EZ80L92AZ050SG
Manufacturer:
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ZiLOG Debug Interface
PS013014-0107
The ZiLOG Debug Interface (ZDI) provides a built-in debugging interface to the eZ80
CPU. ZDI provides basic in-circuit emulation features including:
The above features are built into the silicon. Control is provided through a two-wire inter-
face that is connected to the ZPAK II emulator.
target board, ZPAK II, and the host PC running ZDS II. For more information on ZPAK II
and ZDS II, refer to www.zilog.com.
ZDI allows reading and writing of most internal registers without disturbing the state of
the machine. Reads and Writes to memory may occur as fast as the ZDI can download and
upload data, with a maximum frequency of one-half the eZ80L92 system clock frequency.
Developer
ZiLOG
Studio
Examining and modifying internal registers.
Examining and modifying memory.
Starting and stopping the user program.
Setting program and data break points.
Single-stepping the user program.
Executing user-supplied instructions.
Debugging the final product with the inclusion of one small connector.
Downloading code into SRAM.
‘C’ source-level debugging using ZiLOG Developer Studio (ZDS II)
Figure 35. Typical ZDI Debug Setup
Emulator
ZPAK
Figure 35
O
O
C
N
N
E
C
R
T
Target Board
illustrates a typical setup using a
Product Specification
Product
eZ80
ZiLOG Debug Interface
eZ80L92 MCU
160

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