EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 202

• Manufacturer Part Number: EZ80L92AZ050SG
• Description: IC WEBSERVER 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80L92AZ050SG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80L92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80L920210ZCO
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3878; EZ80L92AZ050SG

Table 114. Opcode Map—Fourth Byte After 0DDh, 0CBh, and dd
PS013014-0107
Legend
First Operand
of Fourth
C
D
A
B
E
F
0
1
2
3
4
5
6
7
8
9
Nibble
Upper
Notes: d = 8-bit two’s-complement displacement.
Byte
0
Lower Nibble of 4th Byte
4
1
0,(IX+d)
BIT
6
2
Second Operand
Mnemonic
3
4
5
RES 0,
RES 2,
RES 4,
RES 6,
SET 0,
SET 2,
SET 4,
SET 6,
(IX+d)
(IX+d)
(IX+d)
BIT 0,
(IX+d)
BIT 2,
(IX+d)
BIT 4,
(IX+d)
BIT 6,
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
RLC
SLA
RL
Lower Nibble (Hex)
6
7
8
9
A
B
Product Specification
C
eZ80L92 MCU
D
RES 1,
RES 3,
RES 5,
RES 7,
SET 1,
SET 3,
SET 5,
SET 7,
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
Opcode Map
BIT 1,
BIT 3,
BIT 5,
BIT 7,
RRC
SRA
SRL
RR
E
F
196