EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 37

• Manufacturer Part Number: EZ80L92AZ050SG
• Description: IC WEBSERVER 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80L92AZ050SG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80L92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80L920210ZCO
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3878; EZ80L92AZ050SG

eZ80
PS013014-0107
Features
New and Improved Instructions
®
CPU Core
ZiLOG’s eZ80
Each software module or task under a real-time executive or operating system can operate
in Z80 compatible (64 KB) mode or full 24-bit (16 MB) address mode.
The eZ80 CPU instruction set is a superset of the instruction sets for the Z80 and Z180
CPUs. Z80 and Z180 programs are executable on an eZ80 CPU with little or no
modification.
The features of eZ80 CPU includes:
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These new instructions are:
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Code-compatible with Z80 and Z180 products.
24-bit linear address space.
Single-cycle instruction fetch.
Pipelined fetch, decode, and execute.
Dual Stack Pointers for ADL (24-bit) and Z80 (16-bit) memory modes.
24-bit CPU registers and arithmetic logic unit (ALU).
Debug support.
Non-maskable Interrupt (NMI) supporting 128 maskable vectored interrupts.
Four new block transfer instructions provide DMA-like operations for memory-to-I/O
and I/O-to-memory transfers:
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INDRX (input from I/O, decrement the memory address, leave the I/O address
unchanged, and repeat).
INIRX (input from I/O, increment the memory address, leave the I/O address
unchanged, and repeat).
OTDRX (output to I/O, decrement the memory address, leave the I/O address
unchanged, and repeat).
OTIRX (output to I/O, increment the memory address, leave the I/O address
unchanged, and repeat).
®
CPU is the first 8-bit microprocessor to support 16 MB linear addressing.
Product Specification
eZ80® CPU Core
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