EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 39

IC WEBSERVER 50MHZ 100LQFP

EZ80L92AZ050SG

Manufacturer Part Number
EZ80L92AZ050SG
Description
IC WEBSERVER 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80L92AZ050SG

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80L92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80L920210ZCO
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3878
EZ80L92AZ050SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80L92AZ050SG
Manufacturer:
Everlight
Quantity:
12 000
Part Number:
EZ80L92AZ050SG
Manufacturer:
Zilog
Quantity:
10 000
Reset
PS013014-0107
Note:
RESET Operation
The RESET controller within the eZ80L92 MCU provides a consistent system reset
(RESET) function for all type of resets that may affect the system. Following four events
can cause a RESET:
During RESET, an internal RESET mode timer holds the system in RESET for
257 system clock (SCLK) cycles. The RESET mode timer begins incrementing on the
next rising edge of SCLK following deactivation of all RESET events (RESET pin, WDT,
real time clock, and Debugger)
You must determine if 257 SCLK cycles provides sufficient time for the primary crystal
oscillator to stabilize.
RESET, through the external RESET pin, must always be executed following application
of power (V
eZ80L92 cannot be guaranteed.
External RESET pin assertion.
Watchdog Timer (WDT) time-out when configured to generate a RESET.
Real time clock alarm with eZ80 CPU in low-power SLEEP mode.
Execution of a Debug RESET command.
DD
ramp). Without the RESET, following power-up, proper operation of the
Product Specification
Reset
33

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