EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 50

• Manufacturer Part Number: EZ80L92AZ050SG
• Description: IC WEBSERVER 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80L92AZ050SG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80L92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80L920210ZCO
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3878; EZ80L92AZ050SG

Interrupt Controller
PS013014-0107
Maskable Interrupts
The interrupt controller on the eZ80L92 MCU routes the interrupt request signals from the
internal peripherals and external devices (through the GPIO pins) to the eZ80 CPU.
On the eZ80L92 MCU, all maskable interrupts use the eZ80 CPU’s vectored interrupt
function.
The maskable interrupt sources are listed in order of their priority, with vector
the highest-priority interrupt. The 16-bit interrupt vector is located at starting address
{I[7:0], IVECT[7:0]}, where I[7:0] is the eZ80 CPU’s Interrupt Page Address Register.
Table 11. Interrupt Vector Sources by Priority
Your program must store the interrupt service routine starting address in the two-byte
interrupt vector locations. For example, for ADL mode the two-byte address for the SPI
interrupt service routine would be stored at {00h, I[7:0], 1Eh} and {00h, I[7:0], 1Fh}. In
Z80 mode, the two-byte address for the SPI interrupt service routine would be stored at
Note: Absolute locations 00h, 08h, 10h, 18h, 20h, 28h, 30h, 38h, and 66h are reserved for hardware
Vector
0Ah
0Ch
0Eh
00h
02h
04h
06h
08h
10h
12h
14h
16h
18h
reset, NMI, and RST instruction.
Table 11
UART 0
Source
Unused
Unused
Unused
Unused
Unused
PRT 0
PRT 1
PRT 2
PRT 3
PRT 4
PRT 5
RTC
lists the low-byte vector for each of the maskable interrupt sources.
Vector
1Ah
1Ch
1Eh
2Ah
2Ch
2Eh
20h
22h
24h
26h
28h
30h
32h
UART 1
Port B 0
Port B 1
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Source
SPI
I
2
C
Vector
3Ah
3Ch
3Eh
4Ah
4Ch
34h
36h
38h
40h
42h
44h
46h
48h
Port B 7
Port C 0
Port C 1
Port C 2
Port C 3
Port C 4
Port C 5
Port C 6
Port B 2
Port B 3
Port B 4
Port B 5
Port B 6
Source
Product Specification
Vector
5Ch
4Eh
5Ah
5Eh
50h
52h
54h
56h
58h
60h
62h
64h
66h
Interrupt Controller
eZ80L92 MCU
00h
Port C 7
Port D 0
Port D 1
Port D 2
Port D 3
Port D 4
Port D 5
Port D 6
Port D 7
Source
Unused
Unused
Unused
Unused
being
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