MC68040FE33A Freescale Semiconductor, MC68040FE33A Datasheet - Page 162

• Manufacturer Part Number: MC68040FE33A
• Description: IC MICROPROCESSOR 32BIT 184-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68040FE33A

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Package: 184CQFP
• Processor Series: M680xx
• Core: CPU32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

7.4.3 Byte, Word, and Long-Word Write Transfers
During a write transfer, the processor transfers data to a memory or peripheral device.
The level on the TCI signal is ignored by the processor during all write cycles. The bus
controller performs byte, word, and long-word write transfers for the following cases:
Figures 7-14 and 7-15 illustrate a flowchart and functional timing diagram for byte, word,
and long-word write bus transfers.
7-20
• Accesses to a disabled cache.
• Accesses to a memory page that is specified noncachable.
• Accesses that are implicitly noncachable (read-modify-write accesses and accesses
• Writes to write-through pages.
• Accesses that do not allocate in the data cache on a write miss (table updates and
• The first transfer of a line write is terminated with TBI, forcing completion of the line
• Cache line pushes for lines containing a single dirty long word.
to an alternate logical address space via the MOVES instruction).
exception stacking).
access using three additional long-word write transfers.
10) DRIVE DATA ON APPROPRIATE BYTES OF
1) REMOVE DATA FROM D31–D0
2) NEGATE TIP (IF REQUIRED)
1) SET R/W TO WRITE
2) DRIVE ADDRESS ON A31–A0
3) DRIVE USER PAGE ATTRIBUTES ON UPA1, UPA0
4) DRIVE SIZE ON SIZ1, SIZ0 (BYTE, WORD, OR
5) DRIVE TRANSFER TYPE ON TT1, TT0
6) DRIVE TRANSFER MODIFIER ON TM2–TM0
7) CIOUT BECOMES VALID
8) ASSERT TS FOR ONE CLOCK
9) ASSERT TIP
Figure 7-14. Byte, Word, and Long-Word Write Transfer Flowchart
LONG WORD)
D31–D0 BASED ON SIZEx, A1, AND A0
TERMINATE TRANSFER
START NEXT CYCLE
ADDRESS DEVICE
PROCESSOR
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
1) DECODE ADDRESS
2) LATCH DATA ON APPROPRIATE BYTES OF
3) ASSERT TRANSFER ACKNOWLEDGE (TA)
1) NEGATE TA
D31–D0 BASED ON SIZEx, A1, AND A0
EXTERNAL DEVICE
TERMINATE CYCLE
ACCEPT DATA
MOTOROLA