KU80960CF33 Intel, KU80960CF33 Datasheet - Page 41

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KU80960CF33

Manufacturer Part Number
KU80960CF33
Description
IC MPU I960CF 33MHZ 196-QFP
Manufacturer
Intel
Datasheet

Specifications of KU80960CF33

Rohs Status
RoHS non-compliant
Processor Type
i960
Features
CF suffix, 32-Bit with DMA, 4K Cache
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
196-QFP
Other names
803114

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Quantity
Price
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Manufacturer:
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Part Number:
KU80960CF33
Manufacturer:
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Quantity:
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80960-40, -33, -25
Figure 19. I
vs. Frequency and Temperature—80960CF-40
CC
1100
T
= 1000°
C
I
- I
under test conditions
CC
CC
T
= 85° C
C
0
f
(MHz)
40
0
F_CX020A
PCLK
5.0
Reset, Backoff and Hold Acknowledge
Table 20
lists the condition of each processor output pin while RESET is asserted (low).
Table 21
lists the condition of each processor output pin while HOLDA is asserted (high).
In
Table
21, with regard to bus output pin state only, the Hold Acknowledge state takes precedence
over the reset state. Although asserting the RESET pin internally resets the processor, the
processor’s bus output pins do not enter the reset state when Hold Acknowledge has been granted
to a previous HOLD request (HOLDA is active). Furthermore, the processor grants new HOLD
requests and enters the Hold Acknowledge state even while in reset.
For example, when HOLD is asserted while HOLDA is inactive and the processor is in the reset
state, the processor’s bus pins enter the Hold Acknowledge state and HOLDA is granted. The
processor is not able to perform memory accesses until the HOLD request is removed, even when
the RESET pin is brought high. This operation is provided to simplify boot-up synchronization
among multiple processors sharing the same bus.
Datasheet
41

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