MC68360ZP25L Freescale Semiconductor, MC68360ZP25L Datasheet - Page 697
MC68360ZP25L
Manufacturer Part Number
MC68360ZP25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360ZP25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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7.15.2.3 NESTED INTERRUPTS. The CPIC supports a fully nested interrupt environment
that allows a higher priority interrupt (from another CPM source) to suspend a lower priority
interrupt’s service routine. This nesting is achieved by the CPM interrupt in-service register
(CISR).
Number
Table 7-22. Prioritization of CPM Interrupt Sources
1D
1C
1F
1E
1B
1A
19
18
17
16
15
14
13
12
11
10
D
C
F
E
B
A
9
8
7
6
5
4
3
2
1
0
Freescale Semiconductor, Inc.
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MC68360 USER’S MANUAL
Go to: www.freescale.com
Parallel I/O–PC0
SCCa (Grouped and Spread)
SCCb (Grouped)
SCCc (Grouped)
SCCd (Grouped)
Parallel I/O–PC1
Timer 1
Parallel I/O–PC2
Parallel I/O–PC3
SDMA Channel Bus Error
IDMA1
IDMA2
SCCb (Spread)
Timer 2
RISC Timer Table
Reserved
Parallel I/O–PC4
Parallel I/O–PC5
SCCc (Spread)
Timer 3
Parallel I/O–PC6
Parallel I/O–PC7
Parallel I/O–PC8
SCCd (Spread)
Timer 4
Parallel I/O–PC9
SPI
SMC1
SMC2/PIP
Parallel I/O–PC10
Parallel I/O–PC11
Reserved
Interrupt Source Description
CPM Interrupt Controller (CPIC)
Multiple
Events
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
—
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