ATF16V8C-7SU Atmel, ATF16V8C-7SU Datasheet - Page 9
![IC PLD EE 7.5NS 20-SOIC](/photos/6/80/68042/453-20-soic_sml.jpg)
ATF16V8C-7SU
Manufacturer Part Number
ATF16V8C-7SU
Description
IC PLD EE 7.5NS 20-SOIC
Manufacturer
Atmel
Datasheet
1.ATF16V8C-7PU.pdf
(23 pages)
Specifications of ATF16V8C-7SU
Programmable Type
EE PLD
Number Of Macrocells
8
Voltage - Input
5V
Speed
7ns
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Family Name
ATF16V8C
Process Technology
EECMOS
# Macrocells
8
# I/os (max)
8
Frequency (max)
125MHz
Propagation Delay Time
7.5ns
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATF16V8C-7SU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
0425H–PLD–3/11
16.1
In simple mode, all feedback paths of the output pins are routed via the adjacent pins. In doing so, the two inner most pins
(pins 15 and 16) will not have the feedback option as these pins are always configured as dedicated combinatorial output.
Atmel ATF16V8C registered mode
PAL device emulation/PAL replacement. The registered mode is used if one or more registers are required. Each
macrocell can be configured as either a registered or combinatorial output or I/O, or as an input. For a registered output or
I/O, the output is enabled by the OE pin, and the register is clocked by the CLK pin. Eight product terms are allocated to
the sum term. For a combinatorial output or I/O, the output enable is controlled by a product term, and seven product
terms are allocated to the sum term. When the macrocell is configured as an input, the output enable is permanently
disabled.
Any register usage will make the compiler select this mode. The following registered devices can be emulated using this
mode:
Figure 17.
Notes:
Figure 18.
Notes:
16R8
16R6
16R4
1. Pin 1 controls common CLK for the registered outputs.
2. The development software configures all the architecture control bits and checks for proper pin usage automatically.
1. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin usage automatically.
Pin 11 controls common OE for the registered outputs.
Pin 1 and Pin 11 are permanently configured as CLK and OE.
Registered configuration for registered mode
Combinatorial configuration for registered mode
16RP8
16RP6
16RP4
(1)(2)
(1)(2)
Atmel ATF16V8C
9